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L9803 データシート(PDF) 95 Page - STMicroelectronics |
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L9803 データシート(HTML) 95 Page - STMicroelectronics |
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95 / 126 page ![]() L9803 On-Chip Peripherals 95/126 Figure 45. Power Bridge Schematic EN bit in BCSR is the main enable signal, active high. If EN = 0, all the bridge transistors are switched off (UL, UR, DL and DR are reset) and the outputs OUTL and OUTR are in high impedance state. Being '0' the status after reset of EN, the bridge is in safe condition (OUTL=OUTR=Z). Therefore the safe condition is guaranteed in undervoltage condition (LVD reset) and in case of main clock (Safeguard reset) or software (Watchdog reset) failures. Each power DMOS has its own over current detector circuit generating SC_xx signals (see Figure 45). SC_xx signals are ORed together to generate SC flag in BCSR register. SC flag is then set by hardware as soon as one of the two outputs (or both) are short to battery, ground or if the two outputs are short together (load short). This read only bit is reset only by clearing the EN bit. The rising edge of SC causes an interrupt request if the PIE bit is set in BCSR register. When the current monitored in any of the four DMOS of the bridge exceeds limit threshold (ISC), the SC bit is set and the corresponding DMOS is switched off after tSCPI time. This function is dominant over any write from data bus by software (i. e. as long as SC is set, the bridge cannot be switched on). To switch the bridge on again the EN bit must be cleared by software. This resets the SC bit. Setting again EN, the bridge is switched on. If the overcurrent condition is still present, SC is set again (and a interrupt is generated when enabled). An internal thermal protection circuit monitors continuously the temperature of the device and drives the OVT bit in BCSR register and, in turn, the OVT signal in Figure 45. The OVT flag is set as soon as the temperature of the chip exceeds Thw and all the transistor of the bridge are switched off. This rising edge causes an interrupt request if the PIE bit is set. This read only bit is reset only by clearing the EN bit. This function is dominant over any write from data bus by software (i. e. as long as OVT is set the bridge cannot be switched on). To switch the bridge on again the EN bit must be cleared by software. This resets the OVT bit. Setting again EN, the bridge is switched on. If the overtemperature condition is still present, OVT is set again (and a interrupt is generated when enabled). VBR PGND OUTR VBL PGND OUTL UL UR DL DR SC_UL OVT SC_DL OVT SC_DR OVT SC_UR OVT |
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