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L9803 データシート(PDF) 104 Page - STMicroelectronics |
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L9803 データシート(HTML) 104 Page - STMicroelectronics |
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104 / 126 page ![]() On-Chip Peripherals L9803 104/126 falling edge of E2LAT bit. It is not possible to read the latched data. Special management of wrong EEPROM access: If a read happens while E2LAT=1, then the data bus will not be driven. If a write access happens while E2LAT=0, then the data on the bus will not be latched. The data latches are cleared when the user sets E2LAT bit. Note: Care should be taken in the write routine: the software has to read back the data and rewrite in case of failure. |
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