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RM0352 データシート(PDF) 93 Page - STMicroelectronics

部品番号 RM0352
部品情報  Brain smart hub family
PDF  138 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

RM0352 データシート(HTML) 93 Page - STMicroelectronics

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RM0352
I2C bus interface
137
Description:
The I2CMISR register indicates the interrupt sources after masking. For the
description of each single bit, refer to the register I2C_RISR. The output signal
int_gbl is asserted when at least one interrupt source of this register is
pending.
10.2.13
I2C interrupt clear register (I2C_ICR)
Table 83. I2C interrupt clear register (I2C_ICR)
Address:
I2CBaseAddress + 0x38
Type:
RW
Reset:
0x00000000
Description:
The I2C_ICR register indicates the interrupt sources after masking. For the
description of each single bit, refer to the register I2C_RISR. When writing to
this register, each data bit that is set to 1b causes the corresponding bit in the
status registers to be cleared. Data bits that are set to 0b have no effect on the
corresponding bit in the register.
10.2.14
I2C hold time data (I2C_THDDAT)
Table 84. I2C hold time data (I2C_THDDAT)
Address:
I2CBaseAddress + 0x04C
Type:
RW
Reset:
0x00000014
Description:
The I2C_THDDAT register is an 8-bit registers, that controls the hold time data
for F/S mode. The register is read-write.
I2C interrupt clear register (I2C_ICR)
31
30
29
28
27 26
25
24
23
22 21
20
19
18
17
16
15
14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
RW
W
W
R
W
W
R
R
W
W
W
W
W
W
W
R
I2C hold time data (I2C_THDDAT)
31
30 29 28
27
26
25
24
23 22
21
20
19
18 17 16
15
14
13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
I2C_THDDAT
RRW



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