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RM0352 データシート(PDF) 50 Page - STMicroelectronics |
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RM0352 データシート(HTML) 50 Page - STMicroelectronics |
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50 / 138 page  ARM© dual timer module (SP804) RM0352 50/138 DocID024647 Rev 1 8.2.2 Functional description The dual timer module block diagram is shown in Figure 6. Figure 6. Dual timer module block diagram 1. In Figure 6 test logic is not shown for clarity. The dual timer module is described in the following sections: • AMBA APB interface • Free running counter blocks • Interface reset • Clock signals and clock enables • Prescaler operation • Timer operation on • Interrupt behavior • Programming the timer interval • Identification registers AMBA APB interface The AMBA APB slave interface generates read and write decodes for accesses to all registers in the dual timer module. |
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