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データシートサーチシステム |
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HT69F360 データシート(PDF) 79 Page - Holtek Semiconductor Inc |
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HT69F360 データシート(HTML) 79 Page - Holtek Semiconductor Inc |
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79 / 235 page  Rev. 1.30 7� �ove��e� 1�� �01� Rev. 1.30 79 �ove��e� 1�� �01� HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM • SMOD1 Register Bit 7 6 5 4 3 2 1 0 �a�e — — — — — LVRF LRF WRF R/W — — — — — R/W R/W R/W POR — — — — — × 0 0 “×”: unknown Bit7~3 Unimplemented,readas“0” Bit2 LVRF:LVRfunctionresetflag 0:Notoccurred 1:Occurred Thisbitissetto1whenaspecificLowVoltageResetsituationconditionoccurs.This bitcanonlybeclearedto0bytheapplicationprogram. Bit1 LRF:LVRCregistersoftwareresetflag 0:Notoccurred 1:Occurred Thisbitissetto1iftheLVRCregistercontainsanynondefinedLVRvoltageregister values.Thisineffectactslikeasoftwareresetfunction.Thisbitcanonlybeclearedto 0bytheapplicationprogram. Bit0 WRF:WDTCregistersoftwareresetflag Describeelsewhere Watchdog Time-out Reset during Normal Operation TheWatchdogtime-outResetduringnormaloperationisthesameasahardwareRESpinreset exceptthattheWatchdogtime-outflagTOwillbesetto“1”. t RS TD + t SST WD T Ti me - out In te r nal R es et Note:tRSTDispower-ondelay,typicaltime=16.7ms WDT Time-out Reset during Normal Operation Timing Chart Watchdog Time-out Reset during SLEEP or IDLE Mode TheWatchdogtime-outResetduringSLEEPorIDLEModeisalittledifferentfromotherkinds ofreset.MostoftheconditionsremainunchangedexceptthattheProgramCounterandtheStack Pointerwillbeclearedto“0”andtheTOflagwillbesetto“1”.RefertotheA.C.Characteristicsfor tSSTdetails. t SST WD T Ti me - out In te r nal R es et Note:ThetSSTis15~16clocksforHIRC. ThetSSTis128clocksforHXTand1024clocksforLXT. ThetSSTis1~2clocksfortheLIRC. WDT Time-out Reset during SLEEP or IDLE Timing Chart |
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