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TX58TEGXDDKTAX0 データシート(PDF) 25 Page - Toshiba Semiconductor

部品番号 TX58TEGXDDKTAX0
部品情報  Semiconductor & Storage Products
PDF  121 Pages
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メーカー  TOSHIBA [Toshiba Semiconductor]
ホームページ  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TX58TEGXDDKTAX0 データシート(HTML) 25 Page - Toshiba Semiconductor

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TOSHIBA CONFIDENTIAL
Tx58TEGxDDKTAx0
TENTATIVE 2013-07-10C
24
TC58TEG6DDKTA00 / TC58TEG6DDKTAI0
TH58TEG7DDKTA20 / TH58TEG7DDKTAK0
TH58TEG8DDKTA20 / TH58TEG8DDKTAK0
2.13. Input/Output Slew rate
The input slew rate requirements that the device shall comply with are defined in Table 18. The output slew rate
requirements that the device shall comply with are defined in Table 20. The testing conditions that shall be used to
verify the input slew rate and output slew rate are listed in Table 19 and Table 21 respectively.
Table 18
Input Slew Rate
Vccq
Minimum slew rate
3.3V
1.0V/ns
1.8V
1.0V/ns
Table 19
Testing Conditions for Input Slew Rate
Parameter
Value
Positive Input Transition
VIL (DC) to VIH (AC)
Negative Input Transition
VIH (DC) to VIL (AC)
Table 20
Output Slew Rate Requirements
Parameter
VccQ=3.3V
VccQ=1.8V
Unit
Minimum
Maximum
Minimum
Maximum
Overdrive 1
1.5
9.0
0.85
5.0
V/ns
Nominal
1.2
7.0
0.75
4.0
V/ns
Underdrive
1.0
5.5
0.60
4.0
V/ns
NOTE :
1) Measured with a test load of 5pF connected to VssQ.
2) The ratio of pull-up slew rate to pull-down slew rate is specified for the same temperature and voltage, over the
entire temperature and voltage range. For a given output, it represents the maximum difference between pull-up
and pull-down drivers due to process variation.



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