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TX58TEGXDDKTAX0 データシート(PDF) 27 Page - Toshiba Semiconductor

部品番号 TX58TEGXDDKTAX0
部品情報  Semiconductor & Storage Products
PDF  121 Pages
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メーカー  TOSHIBA [Toshiba Semiconductor]
ホームページ  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TX58TEGXDDKTAX0 データシート(HTML) 27 Page - Toshiba Semiconductor

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TOSHIBA CONFIDENTIAL
Tx58TEGxDDKTAx0
TENTATIVE 2013-07-10C
26
TC58TEG6DDKTA00 / TC58TEG6DDKTAI0
TH58TEG7DDKTA20 / TH58TEG7DDKTAK0
TH58TEG8DDKTA20 / TH58TEG8DDKTAK0
2.14. High Speed Toggle DDR with ODT
2.14.1. ODT (On die termination)
On Die Termination (ODT) is a feature that allows a NAND Flash device to turn on/off termination resistance for
each DQ and DQS/ DQS . The ODT feature is designed to improve signal integrity of the memory channel by
allowing the NAND Flash controller to independently turn on/off termination resistance for a selected target.
NAND Flash memory supports self-termination only.
2.14.2. ODT setting
ODT setting is configured by ‘SET FEATURE’ operation. Refer to 5.2.9 for the further information. Figure 6 defines
an ODT setting sequence.
Figure 6. ODT setting through ‘SET FEATURE’
2.14.3. ODT behavior during Read operation
ODT is enabled within Read pre-amble period after RE falling, and disabled on CE rising or one of CLE and
ALE rising while CE is low. Figure 7 defines ODT enable/disable behavior and timings during data output.
Figure 7. ODT enable/disable during Read



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