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PIC16F15213 データシート(PDF) 24 Page - Microchip Technology |
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PIC16F15213 データシート(HTML) 24 Page - Microchip Technology |
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24 / 439 page  8.6.2 CONFIG2 Name: CONFIG2 Offset: 0x8008 Configuration Word 2 Bit 15 14 13 12 11 10 9 8 DEBUG STVREN PPS1WAY BORV Access R/W R/W R/W R/W Reset 1 1 1 1 Bit 7 6 5 4 3 2 1 0 BOREN[1:0] WDTE[1:0] PWRTS[1:0] MCLRE Access R/W R/W R/W R/W R/W R/W R/W Reset 1 1 1 1 1 1 1 Bit 13 – DEBUG Debugger Enable(1) Value Description 1 Background debugger disabled 0 Background debugger enabled Bit 12 – STVREN Stack Overflow/Underflow Reset Enable Value Description 1 Stack Overflow or Underflow will cause a Reset 0 Stack Overflow or Underflow will not cause a Reset Bit 11 – PPS1WAY PPSLOCKED One-Way Set Enable Value Description 1 The PPSLOCKED bit can only be set once after an unlocking sequence is executed; once PPSLOCKED is set, all future changes to PPS registers are prevented 0 The PPSLOCKED bit can be set and cleared as needed (unlocking sequence is required) Bit 9 – BORV Brown-out Reset (BOR) Voltage Selection(2) Value Description 1 Brown-out Reset voltage (VBOR) set to 1.9V 0 Brown-out Reset voltage (VBOR) set to 2.85V Bits 7:6 – BOREN[1:0] Brown-out Reset (BOR) Enable(3) Value Description 11 Brown-out Reset enabled, the SBOREN bit is ignored 10 Brown-out Reset enabled while running, disabled in Sleep; the SBOREN bit is ignored 01 Brown-out Reset enabled according to SBOREN 00 Brown-out Reset disabled Bits 4:3 – WDTE[1:0] Watchdog Timer (WDT) Enable Value Description 11 WDT enabled regardless of Sleep; the SEN bit of WDTCON is ignored 10 WDT enabled while Sleep = 0, suspended when Sleep = 1; the SEN bit of WDTCON is ignored 01 WDT enabled/disabled by the SEN bit of WDTCON 00 WDT disabled, the SEN bit of WDTCON is ignored Bits 2:1 – PWRTS[1:0] Power-Up Timer (PWRT) Selection Value Description 11 PWRT disabled 10 PWRT is set at 64 ms PIC16F15213/14/23/24/43/44 Device Configuration © 2020-2022 Microchip Technology Inc. and its subsidiaries Data Sheet DS40002195E-page 24 |
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