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PIC16F15213 データシート(PDF) 99 Page - Microchip Technology |
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PIC16F15213 データシート(HTML) 99 Page - Microchip Technology |
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99 / 439 page  12.9.7 PIR2 Name: PIR2 Offset: 0x70E Peripheral Interrupt Request Register 2 Bit 7 6 5 4 3 2 1 0 CCP2IF NVMIF TMR1GIF Access R/W/HS R/W/HS R/W/HS Reset 0 0 0 Bit 7 – CCP2IF CCP2 Interrupt Flag Value CCP Mode Capture Compare PWM 1 Capture occurred (must be cleared in software) Compare match occurred (must be cleared in software) Output trailing edge occurred (must be cleared in software) 0 Capture did not occur Compare match did not occur Output trailing edge did not occur Bit 6 – NVMIF Nonvolatile Memory (NVM) Interrupt Flag Value Description 1 The requested NVM operation has completed (must be cleared in software) 0 Interrupt event has not occurred Bit 5 – TMR1GIF TMR1 Gate Interrupt Flag Value Description 1 The TMR1 Gate has gone inactive (must be cleared in software) 0 TMR1 Gate is active Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the Global Interrupt Enable (GIE) bit. User software needs to ensure the appropriate interrupt flag bits are cleared before enabling an interrupt. PIC16F15213/14/23/24/43/44 Interrupts © 2020-2022 Microchip Technology Inc. and its subsidiaries Data Sheet DS40002195E-page 99 |
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