PIC16F15213 datasheet(53/439 Pages) MICROCHIP

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Figure 9-20. Traditional/Banked Data Memory Map

Direct Addressing

BSR

From Opcode

7FSRxH

7FSRxL

Indirect Addressing

000000 000001 000010

111111

Bank Select

Location Select

0x00

0x7F

Bank Select

Location Select

Bank 0

Bank 1

Bank 2

Bank 63

Rev. 10-000056B

12/14/2016

Filename:

10-000056B.vsd

Title:

TRADITIONAL DATA MEMORY MAP

Last Edit:

12/14/2016

First Used:

PIC16F153xx

Note:

9.6.2

Linear Data Memory

The linear data memory is the region from FSR address 0x2000 to FSR address 0x2FEF. This region is a virtual

region that points back to the 80-byte blocks of GPR memory in all the banks. Refer to Figure 9-21 for the Linear

Data Memory Map.

Figure 9-21. Linear Data Memory Map

Filename:

10-000057B.vsd

Title:

LINEAR DATA MEMORY MAP

Last Edit:

8/24/2016

First Used:

PIC16F153xx

Note:

0x020

Bank 0

0x06F

0x0A0

Bank 1

0x0EF

0x120

Bank 2

0x16F

0x1920

Bank 50

0x196F

FSRnH

FSRnL

Location Select

0x2000

0x2FEF

Rev. 10-000057B

8/24/2016

Important: The address range 0x2000 to 0x2FEF represents the complete addressable Linear Data

Memory for PIC

® devices (up to Bank 50). The actual implemented Linear Data Memory will differ from one

device to the other in a family.

Unimplemented memory reads as 0x00. Use of the linear data memory region allows buffers to be larger than 80

bytes because incrementing the FSR beyond one bank will go directly to the GPR memory of the next bank.

PIC16F15213/14/23/24/43/44

Memory Organization

and its subsidiaries

Data Sheet

DS40002195E-page 53

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