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データシートサーチシステム |
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データシートサーチシステム |
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4250 データシート(PDF) 13 Page - Renesas Technology Corp |
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4250 データシート(HTML) 13 Page - Renesas Technology Corp |
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13 / 59 page  12 MITSUBISHI MICROCOMPUTERS 4250 Group SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER Fig. 5 Stack registers (SKs) structure Fig. 6 Example of operation at subroutine call SK0 SK1 SK2 SK3 (SP) = 0 (SP) = 1 (SP) = 2 (SP) = 3 Program counter (PC) Executing RT instruction Executing BM instruction Stack pointer (SP) points “3” at reset or returning from RAM back-up mode. It points “0” by executing the first BM instruction, and the contents of program counter is stored in SK0. When the BM instruction is executed after four stack registers are used ((SP) = 3), (SP) = 0 and the contents of SK0 is destroyed. Returning to the BM instruction execution address with the RT instruction, and the BM instruction is equivalent to the NOP instruction. (SP) 0 (SK0) 000116 (PC) SUB1 Main program 000216 NOP Address 000016 NOP 000116 BM SUB1 Subroutine SUB1 : NOP RT (PC) (SK0) (SP) 3 · · · Note: (5) Stack registers (SK s) and stack pointer (SP) Stack registers (SKs) are used to temporarily store the contents of program counter (PC) just before branching until returning to the original routine when; • branching to an interrupt service routine (referred to as an interrupt service routine), • performing a subroutine call, or • executing the table reference instruction (TABP p). Stack registers (SKs) are four identical registers, so that subroutines can be nested up to 4 levels. However, one of stack registers is used respectively when using an interrupt service routine and when executing a table reference instruction. Accordingly, be careful not to over the stack when performing these operations together. The contents of registers SKs are destroyed when 4 levels are exceeded. The register SK nesting level is pointed automatically by 2-bit stack pointer (SP). Figure 5 shows the stack registers (SKs) structure. Figure 6 shows the example of operation at subroutine call. (6) Interrupt stack register (SDP) Interrupt stack register (SDP) is a 1-stage register. When an interrupt occurs, this register (SDP) is used to temporarily store the contents of data pointer, carry flag and skip flag just before an interrupt until returning to the original routine. Unlike the stack registers (SKs), this register (SDP) is not used when executing the subroutine call instruction and the table reference instruction. (7) Skip flag Skip flag controls skip decision for the conditional skip instructions and continuous described skip instructions. When an interrupt occurs, the contents of skip flag is stored automatically in the interrupt stack register (SDP) and the skip condition is retained. |
同様の部品番号 - 4250 |
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同様の説明 - 4250 |
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