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HT69F360 データシート(PDF) 115 Page - Holtek Semiconductor Inc |
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HT69F360 データシート(HTML) 115 Page - Holtek Semiconductor Inc |
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115 / 235 page  Rev. 1.30 114 �ove��e� 1�� �01� Rev. 1.30 115 �ove��e� 1�� �01� HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM Timer/Counter Mode Toselectthismode,bitsCTM1andCTM0intheCTMC1registershouldbesetto11respectively. TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutputMode generatingthesameinterruptflags.TheexceptionisthatintheTimer/CounterModetheTMoutput pinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompareMatch OutputModecanbeusedtounderstanditsfunction.AstheTMoutputpinisnotusedinthismode, thepincanbeusedasanormalI/Opinorotherpin-sharedfunction. PWM Output Mode Toselectthismode,bitsCTM1andCTM0intheCTMC1registershouldbesetto10respectively. ThePWMfunctionwithintheTMisusefulforapplicationswhichrequirefunctionssuchasmotor control,heatingcontrol,illuminationcontroletc.Byprovidingasignaloffixedfrequencybut ofvaryingdutycycleontheTMoutputpin,asquarewaveACwaveformcanbegeneratedwith varyingequivalentDCRMSvalues. AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated waveformisextremelyflexible.InthePWMmode,theCTCCLRbithasnoeffectasthePWM period.BothoftheCCRAandCCRPregistersareusedtogeneratethePWMwaveform,oneregister isusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency,whiletheother oneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleitherfrequencyordutycycle isdeterminedusingtheCTDPXbitintheCTMC1register.ThePWMwaveformfrequencyandduty cyclecanthereforebecontrolledbythevaluesintheCCRAandCCRPregisters. Aninterruptflag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch occursfromeitherComparatorAorComparatorP.TheCTOCbitIntheCTMC1registerisusedto selecttherequiredpolarityofthePWMwaveformwhilethetwoCTIO1andCTIO0bitsareusedto enablethePWMoutputortoforcetheTMoutputpintoafixedhighorlowlevel.TheCTPOLbitis usedtoreversethepolarityofthePWMoutputwaveform. • 10-bit CTM, PWM Mode, Edge-aligned Mode, CTDPX=0 CCRP 001b 010b 011b 100b 101b 110b 111b 000b Pe�iod 1�� �5� 3�4 51� �40 7�� �9� 10�4 Duty CCRA IffSYS=16MHz,TMclocksourceisfSYS/4,CCRP=100b,CCRA=128, TheCTMPWMoutputfrequency=(fSYS/4)/512=fSYS/2048=7.8125kHz,duty=128/512=25%. IftheDutyvaluedefinedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe PWMoutputdutyis100%. • 10-bit CTM, PWM Mode, Edge-aligned Mode, CTDPX=1 CCRP 001b 010b 011b 100b 101b 110b 111b 000b Pe�iod CCRA Duty 1�� �5� 3�4 51� �40 7�� �9� 10�4 ThePWMoutputperiodisdeterminedbytheCCRAregistervaluetogetherwiththeTMclock whilethePWMdutycycleisdefinedbytheCCRPregistervalue. |
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