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ADC32RF83 データシート(PDF) 70 Page - Texas Instruments

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部品番号 ADC32RF83
部品情報  ADC32RF8x Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices
PDF  138 Pages
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

ADC32RF83 データシート(HTML) 70 Page - Texas Instruments

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ADC32RF80, ADC32RF83
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
www.ti.com
70
Product Folder Links: ADC32RF80 ADC32RF83
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Register Maps (continued)
Table 27 lists the register map for the ADC32RF8x.
Table 27. Register Map
REGISTER
ADDRESS
A[11:0] (Hex)
REGISTER DATA
7
6
5
4
3
2
1
0
GENERAL REGISTERS
000
RESET
0
0
0
0
0
0
RESET
002
DIGITAL BANK PAGE SEL[7:0]
003
DIGITAL BANK PAGE SEL[15:8]
004
DIGITAL BANK PAGE SEL[23:16]
010
0
0
0
0
0
0
0
3 or 4 WIRE
011
ADC PAGE SEL
012
0
0
0
0
0
MASTER PAGE
SEL
0
0
MASTER PAGE (M = 0)
020
0
0
0
PDN SYSREF
0
0
PDN CHB
GLOBAL PDN
032
0
0
INCR CM
IMPEDANCE
0
0
0
0
0
039
0
ALWAYS WRITE 1
0
ALWAYS WRITE 1
0
0
PDN CHB EN
SYNC TERM DIS
03C
0
SYSREF DEL EN
0
0
0
0
SYSREF DEL[4:3]
03D
0
0
0
0
0
JESD OUTPUT SWING
05A
SYSREF DEL[2:0]
0
0
0
0
0
057
0
0
0
SEL SYSREF REG
ASSERT SYSREF
REG
0
0
0
058
0
0
SYNCB POL
0
0
0
0
0
ADC PAGE (FFh, M = 0)
03F
0
0
0
0
0
SLOW SP EN1
0
0
042
0
0
0
SLOW SP EN2
0
0
0
0
Offset Corr Page Channel A (610000h, M = 1)
68
FREEZE OFFSET
CORR
0
ALWAYS WRITE 1
0
0
DIS OFFSET
CORR
ALWAYS WRITE 1
0
Offset Corr Page Channel B (610100h, M = 1)
68
FREEZE OFFSET
CORR
0
ALWAYS WRITE 1
0
0
DIS OFFSET
CORR
ALWAYS WRITE 1
0
Digital Gain Page Channel A (610005, M = 1)
0A6
0
0
0
0
DIGITAL GAIN



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