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ADC32RF83 データシート(PDF) 99 Page - Texas Instruments

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部品番号 ADC32RF83
部品情報  ADC32RF8x Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices
PDF  138 Pages
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

ADC32RF83 データシート(HTML) 99 Page - Texas Instruments

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ADC32RF80, ADC32RF83
www.ti.com
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
Product Folder Links: ADC32RF80 ADC32RF83
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
8.5.12.4 Register 005h (address = 005h), Decimation Filter Page
Figure 190. Register 005h
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
REAL OUT EN
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 75. Register 005h Field Descriptions
Bit
Field
Type
Reset
Description
7-1
0
W
0h
Must write 0
0
REAL OUT EN
R/W
0h
This bit converts the complex output to real output at 2x the
output rate.
0 = Complex output format
1 = Real output format
8.5.12.5 Register 006h (address = 006h), Decimation Filter Page
Figure 191. Register 006h
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
DDC MUX
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 76. Register 006h Field Descriptions
Bit
Field
Type
Reset
Description
7-1
0
W
0h
Must write 0
0
DDC MUX
R/W
0h
This bit connects the DDC to the alternate channel ADC to
enable up to four DDCs with one ADC and completely turn off
the other ADC channel.
0 = Normal operation
1 = DDC block takes input from the alternate ADC
8.5.12.6 Register 007h (address = 007h), Decimation Filter Page
Figure 192. Register 007h
7
6
5
4
3
2
1
0
DDC0 NCO1 LSB
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Table 77. Register 007h Field Descriptions
Bit
Field
Type
Reset
Description
7-0
DDC0 NCO1 LSB
R/W
0h
These bits are the LSB of the NCO frequency word for NCO1 of
DDC0 (band 1).
The LSB represents fS / (2
16), where f
S is the ADC sampling
frequency.



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