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ADC32RF83 データシート(PDF) 76 Page - Texas Instruments |
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ADC32RF83 データシート(HTML) 76 Page - Texas Instruments |
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76 / 138 page  76 ADC32RF80, ADC32RF83 SBAS774A – MAY 2016 – REVISED DECEMBER 2016 www.ti.com Product Folder Links: ADC32RF80 ADC32RF83 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 8.5.2 Register Descriptions 8.5.2.1 General Registers 8.5.2.1.1 Register 000h (address = 000h), General Registers Figure 145. Register 000h 7 6 5 4 3 2 1 0 RESET 0 0 0 0 0 0 RESET R/W-0h W-0h W-0h W-0h W-0h W-0h W-0h R/W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset (1) Both bits (7, 0) must be set simultaneously to perform a reset. Table 31. Register 000h Field Descriptions Bit Field Type Reset Description 7 RESET R/W 0h 0 = Normal operation 1 = Internal software reset, clears back to 0 6-1 0 W 0h Must write 0 0 RESET R/W 0h 0 = Normal operation(1) 1 = Internal software reset, clears back to 0 8.5.2.1.2 Register 002h (address = 002h), General Registers Figure 146. Register 002h 7 6 5 4 3 2 1 0 DIGITAL BANK PAGE SEL[7:0] R/W-0h LEGEND: R/W = Read/Write; -n = value after reset Table 32. Register 002h Field Descriptions Bit Field Type Reset Description 7-0 DIGITAL BANK PAGE SEL[7:0] R/W 0h Program the JESD BANK PAGE SEL[23:0] bits to access the desired page in the JESD bank. 680000h = Main digital page CHA selected 680100h = Main digital page CHB selected 610000h = Digital function page CHA selected 610100h = Digital function page CHB selected 690000h = JESD digital page selected |
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