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H8SX/1663M データシート(PDF) 83 Page - Renesas Technology Corp |
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H8SX/1663M データシート(HTML) 83 Page - Renesas Technology Corp |
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83 / 1504 page  Section 2 CPU Rev. 2.00 Sep. 24, 2008 Page 51 of 1468 REJ09B0412-0200 Function Instructions Size Types BRA/BS, BRA/BC, BSR/BS, BSR/BC B* 3 Bcc* 4, JMP, BSR, JSR, RTS — RTS/L L* 5 Branch BRA/S — 9 TRAPA, RTE, SLEEP, NOP — RTE/L L* 5 System control LDC, STC, ANDC, ORC, XORC B/W/L 10 Total 87 [Legend] B: Byte size W: Word size L: Longword size Notes: 1. POP.W Rn and PUSH.W Rn are identical to MOV.W @SP +, Rn and MOV.W Rn, @ −SP. POP.L ERn and PUSH.L ERn are identical to MOV.L @SP +, ERn and MOV.L ERn, @ −SP. 2. Size of data to be added with a displacement 3. Size of data to specify a branch condition 4. Bcc is the generic designation of a conditional branch instruction. 5. Size of general register to be restored 6. Only when the multiplier is available. |
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