H8SXSLASH1663M datasheet(11/1504 Pages) RENESAS

11 / 1504 page

Rev. 2.00 Sep. 24, 2008 Page xi of xxxii

Section 4 Resets ...................................................................................................95

4.1

Types of Resets................................................................................................................... 95

4.2

Input/Output Pin ................................................................................................................. 97

4.3

Register Descriptions .......................................................................................................... 98

4.3.1

Reset Status Register (RSTSR)........................................................................... 98

4.3.2

Reset Control/Status Register (RSTCSR)......................................................... 100

4.4

Pin Reset ........................................................................................................................... 101

4.5

Power-on Reset (POR) (H8SX/1668M Group) .............................................................. 101

4.6

Power Supply Monitoring Reset (H8SX/1668M Group).................................................. 102

4.7

Deep Software Standby Reset........................................................................................... 103

4.8

Watchdog Timer Reset ..................................................................................................... 103

4.9

Determination of Reset Generation Source....................................................................... 104

Section 5 Voltage Detection Circuit (LVD) ......................................................105

5.1

Features............................................................................................................................. 105

5.2

Register Descriptions ........................................................................................................ 106

5.2.1

Voltage Detection Control Register (LVDCR)................................................. 106

5.2.2

Reset Status Register (RSTSR)......................................................................... 107

5.3

Voltage Detection Circuit ................................................................................................. 109

5.3.1

Voltage Monitoring Reset................................................................................. 109

5.3.2

Voltage Monitoring Interrupt............................................................................ 110

5.3.3

Release from Deep Software Standby Mode by the Voltage-Detection

Circuit ............................................................................................................... 112

5.3.4

Voltage Monitor................................................................................................ 112

Section 6 Exception Handling ...........................................................................113

6.1

Exception Handling Types and Priority............................................................................ 113

6.2

Exception Sources and Exception Handling Vector Table ............................................... 114

6.3

Reset ................................................................................................................................. 116

6.3.1

Reset Exception Handling................................................................................. 116

6.3.2

Interrupts after Reset......................................................................................... 117

6.3.3

On-Chip Peripheral Functions after Reset Release ........................................... 117

6.4

Traces................................................................................................................................ 119

6.5

Address Error.................................................................................................................... 120

6.5.1

Address Error Source........................................................................................ 120

6.5.2

Address Error Exception Handling ................................................................... 121

6.6

Interrupts........................................................................................................................... 123

6.6.1

Interrupt Sources............................................................................................... 123

6.6.2

Interrupt Exception Handling ........................................................................... 123

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