H8SXSLASH1663M datasheet(26/1504 Pages) RENESAS

26 / 1504 page

Rev. 2.00 Sep. 24, 2008 Page xxvi of xxxii

20.3.26

Transceiver Test Register 0 (TRNTREG0) ...................................................... 996

20.3.27

Transceiver Test Register 1 (TRNTREG1) ...................................................... 998

20.4

Interrupt Sources............................................................................................................. 1000

20.5

Operation ........................................................................................................................ 1002

20.5.1

Cable Connection............................................................................................ 1002

20.5.2

Cable Disconnection ....................................................................................... 1003

20.5.3

Suspend and Resume Operations.................................................................... 1003

20.5.4

Control Transfer.............................................................................................. 1012

20.5.5

EP1 Bulk-Out Transfer (Dual FIFOs)............................................................. 1018

20.5.6

EP2 Bulk-In Transfer (Dual FIFOs) ............................................................... 1019

20.5.7

EP3 Interrupt-In Transfer................................................................................ 1021

20.6

Processing of USB Standard Commands and Class/Vendor Commands ....................... 1022

20.6.1

Processing of Commands Transmitted by Control Transfer ........................... 1022

20.7

Stall Operations .............................................................................................................. 1023

20.7.1

Overview ........................................................................................................ 1023

20.7.2

Forcible Stall by Application .......................................................................... 1023

20.7.3

Automatic Stall by USB Function Module ..................................................... 1025

20.8

DMA Transfer ................................................................................................................ 1026

20.8.1

Overview ........................................................................................................ 1026

20.8.2

DMA Transfer for Endpoint 1 ........................................................................ 1026

20.8.3

DMA Transfer for Endpoint 2 ........................................................................ 1027

20.9

Example of USB External Circuitry ............................................................................... 1028

20.10 Usage Notes .................................................................................................................... 1030

20.10.1

Receiving Setup Data...................................................................................... 1030

20.10.2

Clearing the FIFO ........................................................................................... 1030

20.10.3

Overreading and Overwriting the Data Registers ........................................... 1030

20.10.4

Assigning Interrupt Sources to EP0 ................................................................ 1031

20.10.5

Clearing the FIFO When DMA Transfer is Enabled ...................................... 1031

20.10.6

Notes on TR Interrupt ..................................................................................... 1031

20.10.7

Restrictions on Peripheral Module Clock (P

φ) Operating Frequency............. 1032

20.10.8

Notes on Deep Software Standby Mode when USB is Used .......................... 1032

Section 21 I

2C Bus Interface 2 (IIC2)..............................................................1033

21.1

Features........................................................................................................................... 1033

21.2

Input/Output Pins............................................................................................................ 1035

21.3

Register Descriptions...................................................................................................... 1036

21.3.1

2C Bus Control Register A (ICCRA) ............................................................. 1037

21.3.2

2C Bus Control Register B (ICCRB) ............................................................. 1039

21.3.3

2C Bus Mode Register (ICMR)...................................................................... 1041

21.3.4

2C Bus Interrupt Enable Register (ICIER)..................................................... 1042

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