H8SXSLASH1663M datasheet(27/1504 Pages) RENESAS

27 / 1504 page

Rev. 2.00 Sep. 24, 2008 Page xxvii of xxxii

21.3.5

2C Bus Status Register (ICSR)....................................................................... 1045

21.3.6

Slave Address Register (SAR)........................................................................ 1048

21.3.7

2C Bus Transmit Data Register (ICDRT)....................................................... 1049

21.3.8

2C Bus Receive Data Register (ICDRR)........................................................ 1049

21.3.9

2C Bus Shift Register (ICDRS)...................................................................... 1049

21.4

Operation ........................................................................................................................ 1050

21.4.1

2C Bus Format................................................................................................ 1050

21.4.2

Master Transmit Operation ............................................................................. 1051

21.4.3

Master Receive Operation............................................................................... 1053

21.4.4

Slave Transmit Operation ............................................................................... 1055

21.4.5

Slave Receive Operation................................................................................. 1058

21.4.6

Noise Canceler................................................................................................ 1059

21.4.7

Example of Use............................................................................................... 1060

21.5

Interrupt Request............................................................................................................. 1064

21.6

Bit Synchronous Circuit.................................................................................................. 1064

21.7

Usage Notes .................................................................................................................... 1065

Section 22 A/D Converter................................................................................1067

22.1

Features........................................................................................................................... 1067

22.2

Input/Output Pins............................................................................................................ 1070

22.3

Register Descriptions ...................................................................................................... 1071

22.3.1

A/D Data Registers A to H (ADDRA to ADDRH) ........................................ 1072

22.3.2

A/D Control/Status Register for Unit 0 (ADCSR_0)...................................... 1073

22.3.3

A/D Control/Status Register for Unit 1 (ADCSR_1)...................................... 1075

22.3.4

A/D Control Register for Unit 0 (ADCR_0)................................................... 1077

22.3.5

A/D Control Register for Unit 1 (ADCR_1)................................................... 1079

22.4

Operation ........................................................................................................................ 1081

22.4.1

Single Mode.................................................................................................... 1081

22.4.2

Scan Mode ...................................................................................................... 1082

22.4.3

Input Sampling and A/D Conversion Time .................................................... 1085

22.4.4

External Trigger Input Timing........................................................................ 1087

22.5

Interrupt Source .............................................................................................................. 1089

22.6

A/D Conversion Accuracy Definitions ........................................................................... 1090

22.7

Usage Notes .................................................................................................................... 1092

22.7.1

Module Stop Function Setting ........................................................................ 1092

22.7.2

A/D Input Hold Function in Software Standby Mode .................................... 1092

22.7.3

Notes on A/D Activation by an External Trigger ........................................... 1092

22.7.4

Permissible Signal Source Impedance ............................................................ 1093

22.7.5

Influences on Absolute Accuracy ................................................................... 1094

22.7.6

Setting Range of Analog Power Supply and Other Pins ................................. 1094

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