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H8SX/1663M データシート(PDF) 909 Page - Renesas Technology Corp

部品番号 H8SX/1663M
部品情報  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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Section 19 Serial Communication Interface (SCI, IrDA, CRC)
Rev. 2.00 Sep. 24, 2008 Page 877 of 1468
REJ09B0412-0200
Bit Functions in Normal Serial Communication Interface Mode (When SMIF in SCMR = 0):
Bit
Bit Name
Initial
Value
R/W
Description
7
C/
A
0
R/W
Communication Mode
0: Asynchronous mode
1: Clocked synchronous mode*
6
CHR
0
R/W
Character Length (valid only in asynchronous mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length. LSB-first is fixed and
the MSB (bit 7) in TDR is not transmitted in
transmission.
In clocked synchronous mode, a fixed data length of 8
bits is used.
5
PE
0
R/W
Parity Enable (valid only in asynchronous mode)
When this bit is set to 1, the parity bit is added to transmit
data before transmission, and the parity bit is checked in
reception. For a multiprocessor format, parity bit addition
and checking are not performed regardless of the PE bit
setting.
4
O/
E
0
R/W
Parity Mode (valid only when the PE bit is 1 in
asynchronous mode)
0: Selects even parity.
1: Selects odd parity.
3
STOP
0
R/W
Stop Bit Length (valid only in asynchronous mode)
Selects the stop bit length in transmission.
0: 1 stop bit
1: 2 stop bits
In reception, only the first stop bit is checked. If the
second stop bit is 0, it is treated as the start bit of the next
transmit frame.
2
MP
0
R/W
Multiprocessor Mode (valid only in asynchronous mode)
When this bit is set to 1, the multiprocessor function is
enabled. The PE bit and O/
E bit settings are invalid in
multiprocessor mode.



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