H8SXSLASH1663M datasheet(143/1504 Pages) RENESAS

部品番号	H8SX/1663M

部品情報	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1504 Pages

Scroll/Zoom	100%

メーカー	RENESAS [Renesas Technology Corp]

ホームページ	http://www.renesas.com

Logo

143 / 1504 page

Section 5 Voltage Detection Circuit (LVD)

Rev. 2.00 Sep. 24, 2008 Page 111 of 1468

REJ09B0412-0200

IER.IRQ14E = write 0

LVDCR.LVDRI = write 1

LVDCR.LVDE = write 1

PFCRB.ITS14 = write 1

ISR.IRQ14F = clear

Clear RSTSR.LVDF

IER.IRQ14E = write 1

ISCR setting

(IRQ14SR = 0, IRQ14SF = 1)

LVDCR.

LVDMON = 1

(Vcc low)

(Vcc high)

Yes

Note:

* When the LVDF cannot be cleared despite Vcc being at a higher electrical potential than

Vdet (LVDMON = 1), the voltage-detection circuit is in the state of waiting for stabilization.

Clear the bit again after the stabilization time (t

POR) has elapsed.

Start program

Processing

for lowered Vcc

Interrupt generation

when a low voltage is

detected

Voltage monitoring interrupt

(IRQ14) disabled

Voltage detection and

IRQ register settings

If the flag has been set to 1

before the voltage-monitoring

interrupt is enabled, clear it

by writing 0 after having read

it as 1.

Voltage-monitoring interrupt

(IRQ14) enabled

Processing for lowered Vcc

Figure 5.4 Example of the Procedure for Setting the Voltage-Monitoring Interrupt

H8SX/1663M データシート(PDF) 143 Page - Renesas Technology Corp

H8SX/1663M データシート(HTML) 143 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

データシートダウンロード