MCP6V06T datasheet(28/44 Pages) MICROCHIP

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MCP6V06/7/8

DS22093B-page 28

4.3.9.5

Other PCB Thermal Design Tips

In cases where an individual resistor needs to have its

thermo-junction voltage cancelled, it can be split into

two equal resistors as shown in Figure 4-14. To keep

the thermal gradients near the resistors as small as

possible, the layouts are symmetrical with a ring of

metal around the outside. Make R1A =R1B =R1/2 and

R2A =R2B =2R2.

FIGURE 4-14:

PCB Layout for Individual

Resistors.

Minimize temperature gradients at critical components

(resistors, op amps, heat sources, etc.):

• Minimize exposure to gradients

- Small components

- Tight spacing

- Shield from air currents

• Align with constant temperature (contour) lines

- Place on PCB center line

• Minimize magnitude of gradients

- Select parts with lower power dissipation

- Use same metal junctions on thermo-junc-

tions that need to match

- Use metal junctions with low temperature to

voltage coefficients

- Large distance from heat sources

- Ground plane underneath (large area)

- FR4 gaps (no copper for thermal insulation)

- Series resistors inserted into traces (adds

thermal and electrical resistance)

- Use heat sinks

Make the temperature gradient point in one direction:

• Add guard traces

- Constant temperature curves follow the

traces

- Connect to ground plane

• Shape any FR4 gaps

- Constant temperature curves follow the

edges

4.3.9.6

Crosstalk

DC crosstalk causes offsets that appear as a larger

input offset voltage. Common causes include:

• Common mode noise (remote sensors)

• Ground loops (current return paths)

• Power supply coupling

Interference from the mains (usually 50 Hz or 60 Hz),

and other AC sources, can also affect the DC perfor-

mance. Non-linear distortion can convert these signals

to multiple tones, included a DC shift in voltage. When

the signal is sampled by an ADC, these AC signals can

also be aliased to DC, causing an apparent shift in

offset.

To reduce interference:

- Keep traces and wires as short as possible

- Use shielding (e.g., encapsulant)

- Use ground plane (at least a star ground)

- Place the input signal source near to the DUT

- Use good PCB layout techniques

- Use a separate power supply filter (bypass

capacitors) for these auto-zeroed op amps

4.3.9.7

Miscellaneous Effects

Keep the resistances seen by the input pins as small

and as near to equal as possible to minimize bias cur-

rent related offsets.

Make the (trace) capacitances seen by the input pins

small and equal. This is helpful in minimizing switching

glitch-induced offset voltages.

Bending a coax cable with a radius that is too small

causes a small voltage drop to appear on the center or

(the tribo-electric effect). Make sure the bending radius

is large enough to keep the conductors and insulation

in full contact.

Mechanical stresses can make some capacitor types

(such as ceramic) to output small voltages. Use more

appropriate capacitor types in the signal path and

minimize mechanical stresses and vibration.

Humidity can cause electro-chemical potential voltages

to appear in a circuit. Proper PCB cleaning helps, as

does the use of encapsulants.

Note:

Changing the orientation of the resistors

will usually cause a significant decrease in

the cancellation of the thermal voltages.

R1B

R1A

R2B

R2A

R1B

R1A

R2B

R2A

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