MCP6V06T datasheet(40/44 Pages) MICROCHIP

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MCP6V06/7/8

DS22093B-page 40

APPENDIX B: OFFSET RELATED

TEST SCREENS

Input offset voltage related specifications in the DC

spec table (Table 1-1) are based on bench measure-

ments (see Section 2.1 “DC Input Precision”). These

measurements are much more accurate because:

• More compact circuit

• Soldered parts on the PCB

• More time spent averaging (reduces noise)

• Better temperature control

- Reduced temperature gradients

- Greater accuracy

We use production screens to ensure the quality of our

outgoing products. These screens are set at wider lim-

its to eliminate any fliers; see Table B-1.

TABLE B-1:

OFFSET RELATED TEST SCREENS

Electrical Characteristics: Unless otherwise indicated, TA = 25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/3,

VOUT =VDD/2, VL =VDD/2, RL = 20 kΩ to VL, and CS = GND (refer to Figure 1-5 and Figure 1-6).

Parameters

Sym

Min

Max Units

Conditions

Input Offset

Input Offset Voltage

VOS

-10

+10

µV

TA = +25°C (Note 1, Note 2)

Input Offset Voltage Drift with Temperature

(linear Temp. Co.)

TC1

——

nV/°C TA = -40 to +125°C (Note 3)

Power Supply Rejection

PSRR

115

—

(Note 1)

Common Mode

Common Mode Rejection

CMRR

106

—

VDD = 1.8V, VCM = -0.2V to 2.0V (Note 1)

CMRR

116

—

VDD = 5.5V, VCM = -0.2V to 5.7V (Note 1)

Open-Loop Gain

DC Open-Loop Gain (large signal)

AOL

114

—

VDD = 1.8V, VOUT = 0.2V to 1.6V (Note 1)

AOL

122

—

VDD = 5.5V, VOUT = 0.2V to 5.3V (Note 1)

Note 1:

Due to thermal junctions and other errors in the production environment, these specifications are only screened in

production.

VOS is also sample screened at +125°C.

TC1 is not measured in production.

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