PC87309VLJ datasheet(29/192 Pages) NSC

29 / 192 page

Configuration

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Bit 4 - KBC-Lock

This bit Locks the access to the configuration registers

of the KBC, Logical Device 6.

0: Access is enabled.

1: Access is disabled. Writes are ignored and reads

returns 0 upon access to Logical Device 6.

Bit 5 - Lock Scratch Bit

This bit controls bits 7 and 6 of this register. Once this

bit is set to 1 by software, it can be cleared to 0 only by

a hardware reset.

0: Bits 7 and 6 of this register are read/write bits.

1: Bits 7 and 6 of this register are read only bits.

Bits 7,6 - General Purpose Scratch Bits

When bit 5 is set to 1, these bits are read only. After re-

set they can be read or written. Once changed to read-

only, they can be changed back to be read/write bits

only by a hardware reset.

2.4.3

SuperI/O Configuration 2 Register (SIOCF2)

This is a read/write register in Two-UART mode only. (In

Full-IR mode, it is a read only 00h register and cannot be

modified.) It controls the function multiplexing of the follow-

ing pins:

Pin 43 - IRRX/P12/DRATE0

Pin 44 - IRTX/DENSEL

Pin 45 - MTR0/DRATE0

Pin 46 - MTR1/P12

Pin 48 - DR1/DENSEL

In addition, it controls the function of DR0,1 pins when

MTR0,1 are de-selected.

Configuring the same function by software on more than

one pin is illegal, and may cause unpredictable results.

Bit 0 - MTR0/DRATE0 Select

0: Pin 45 is MTR0

1: Pin 45 is DRATE0 (with MTR0 DC characteristics)

Bit 1 - MTR1/P12 Select

0: Pin 46 is MTR1

1: Pin 46 is P12 (open drain with MTR1 current sink

characteristics)

Bit 2 - DR0,1 Function

DR0 and DR1 function in a single, motor-drive-select

operation. DR0 is affected only when MTR0 is de-se-

lected (bit 0 is set to 1); DR1 is affected only when MTR1

is de-selected (bit 1 is set to 1).

0: No change in DR0,1 function

1: DR0,1 become a logical OR of DR0,1 and MTR0,1

when bits 0,1 are set to 1, respectively.

Bit 3 - DR1/DENSEL Select

0: Pin 48 is DR1

1: Pin 48 is DENSEL

Bits 5,4 - IRRX/P12/DRATE0 Select

X0: Pin 43 is IRRX1

01: Pin 43 is P12

11: Pin 43 is DRATE0

Bit 6 - IRTX/DENSEL Select

0: Pin 44 is IRTX

1: Pin 44 is DENSEL (with IRTX DC characteristics)

Bit 7 - Reserved

This is read only 0.

2.4.4

SRID Register

This read-only register contains the identity number of the

chip revision. SRID is incremented on each revision.

76543210

Reset

Required

SuperI/O Configuration 2

Index 22h

MTR0/DRATE0 Select

MTR1/P12 Select

DR0,1 Function

DR1/DENSEL Select

IRRX1/P12/DRATE0 Select

IRTX/DENSEL Select

Reserved

76543210

Reset

Required

SRID

Index 27h

Chip Revision ID

PC87309VLJ データシート(PDF) 29 Page - National Semiconductor (TI)

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