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ADC32RF83 データシート(PDF) 115 Page - Texas Instruments

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部品番号 ADC32RF83
部品情報  ADC32RF8x Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices
PDF  138 Pages
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

ADC32RF83 データシート(HTML) 115 Page - Texas Instruments

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ADC32RF80, ADC32RF83
www.ti.com
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
Product Folder Links: ADC32RF80 ADC32RF83
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
8.5.13.12 Register 021h (address = 021h), Power Detector Page
Figure 240. Register 021h
7
6
5
4
3
2
1
0
0
0
0
PWRDETACCU
W-0h
W-0h
W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 109. Register 021h Field Descriptions
Bit
Field
Type
Reset
Description
7-5
0
W
0h
Must write 0
4-0
PWRDETACCU
R/W
0h
These bits program the block length to be used for RMS power
computation.
The block length is defined in terms of fS / 8 clocks and can be
programmed as 2M, where M = 0 to 16.
8.5.13.13 Register 022h-025h (address = 022h-025h), Power Detector Page
Figure 241. Register 022h
7
6
5
4
3
2
1
0
PWRDETH[7:0]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Figure 242. Register 023h
7
6
5
4
3
2
1
0
PWRDETH[15:8]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Figure 243. Register 024h
7
6
5
4
3
2
1
0
PWRDETL[7:0]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Figure 244. Register 025h
7
6
5
4
3
2
1
0
PWRDETL[15:8]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Table 110. Register 022h-025h Field Descriptions
Bit
Field
Type
Reset
Description
7-0
PWRDETH[15:0]
PWRDETL[15:0]
R/W
0h
The computed average power is compared against these high and low
thresholds. One LSB of the thresholds represents 1 / 216.
Example: if PWRDETH is set to –14 dBFS from peak, (10(–14 / 20))2 × 216 = 2609,
then set 5422h, 5423h, 5C22h, 5C23h = 0A31h.



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