| データシートサーチシステム |
|
ISL73847SEHDEMO2Z データシート(PDF) 5 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
ISL73847SEHDEMO2Z データシート(HTML) 5 Page - Renesas Technology Corp |
|
5 / 40 page ![]() R34DS0017EU0104 Rev.1.04 Page 5 Jan 31, 2025 ISL73041SEH Datasheet 6AVCC 1 The output of the internal 5V LDO regulator for chip bias. Input is VDD. A minimum of 1µF ceramic decoupling capacitor is necessary on AVCC to SGND. 7 VDD 2 Input supply to chip. Recommended bias range is 4.75V to 18V. 8FB 1 PVCC LDO error amplifier inverting input. A resistor divider network from FB to PVCC and SGND sets the PVCC LDO output voltage. If FB is connected to PVCC, PVCC output voltage is 4.5V. 9PVCC 1 Output of the LDO for the gate drive voltage. Recommended PVCC range is 4.5V to 5.5V. A minimum 1µF ceramic decoupling capacitor is necessary on PVCC to PGND. 10 PGND - Low-side driver output reference pin. For typical applications, connect PGND to ground plane and SGND (PAD). Alternatively, connect PGND directly to the low-side transistor's source terminal. 11 LGL 5 Low-side sink driver for gate turn-off. Connect this pin to LGH and the GaN FET gate. 12 LGH 4 Low-side source driver for gate turn-on. Connect this pin to LGL and the GaN FET gate. 13 PHS 3 High-side GaN FET source reference. Connect to the phase switching node of the half- bridge. 14 UGL 7 High-side sink driver for gate turn-off. Connect this pin to UGH and the GaN FET gate. 15 UGH 6 High-side source driver for gate turn-on. Connect this pin to UGL and the GaN FET gate. 16 BOOT 3 High-side bootstrap bias pin. Connect a bootstrap capacitor from this pin to PHS. An internal bootstrap switch connects PVCC to BOOT when PWM = 0V and PHS voltage is within 250mV of PGND. PAD SGND - Analog signal GND and package bottom thermal pad. The die substrate is electrically connected to PAD. Connect to the ground plane. LID SGND - The package lid is internally connected to the four bottom pads, die substrate and SGND. Pin Number Pin Name ESD Circuit Description PGND Package Pin PVCC Package Pin 0.7V Clamp 0.7V Clamp PHS Package Pin BOOT Package Pin 0.7V Clamp Circuit 4 Circuit 5 Circuit 6 Circuit 7 0.7V Clamp PGND PGND PHS PGND Package Pin Package Pin 9.6V Clamp 28.8V Clamp BOOT 9.6V Clamp 28.8V Clamp Circuit 1 Circuit 2 Circuit 3 |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |