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H8SX/1663M データシート(PDF) 430 Page - Renesas Technology Corp

部品番号 H8SX/1663M
部品情報  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663M データシート(HTML) 430 Page - Renesas Technology Corp

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Section 10 DMA Controller (DMAC)
Rev. 2.00 Sep. 24, 2008 Page 398 of 1468
REJ09B0412-0200
Bit
Bit Name
Initial
Value
R/W
Description
4
3
2
1
0
DARA4
DARA3
DARA2
DARA1
DARA0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Destination Address Extended Repeat Area
Specify the extended repeat area on the destination
address (DDAR). With the extended repeat area, the
specified lower address bits are updated and the
remaining upper address bits are fixed. The extended
repeat area size is specified from four bytes to 128
Mbytes in units of byte and a power of 2.
When the lower address is overflowed from the
extended repeat area by address update, the address
becomes the start address and the end address of the
area for address addition and subtraction, respectively.
When an overflow in the extended repeat area occurs
with the DARIE bit set to 1, an interrupt can be
requested. Table 10.3 shows the settings and areas of
the extended repeat area.



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