HD404369F datasheet(50/117 Pages) RENESAS

50 / 117 page

HD404369 Series

D Port (D

0–D13): Consist of 14 input/output pins addressed by one bit.

Pins D

0–D13 are set by the SED and SEDD instructions, and reset by the RED and REDD instructions.

Output data is stored in the port data register (PDR) for each pin. All pins D

0–D13 are tested by the TD and

TDD instructions.

The on/off statuses of the output buffers are controlled by D-port data control registers (DCD0–DCD3:

$02C–$02F) that are mapped to memory addresses (figure 28).

Pins D

0–D2, D4 are multiplexed with peripheral function pins INT0, INT1, EVNB, and STOPC, respectively.

The peripheral function modes of these pins are selected by bits 0–3 (PMRB0– PMRB3) of port mode

Pin D

3 is multiplexed with peripheral function pin BUZZ. The peripheral function mode of this pin is

selected by bit 3 (PMRA3) of port mode register A (PMRA: $004) (figure 30).

R Ports (R0

0–R93): 39 input/output pins addressed in 4-bit units. Data is input to these ports by the LAR

and LBR instructions, and output from them by the LRA and LRB instructions. Output data is stored in the

port data register (PDR) for each pin. The on/off statuses of the output buffers of the R ports are controlled

by R-port data control registers (DCR0–DCR9: $030–$039) that are mapped to memory addresses (figure

28).

Pin R0

0 is multiplexed with peripheral function pin SCK. The peripheral function mode of this pin is

selected by bit 3 (SMR3) of serial mode register (SMR: $005) (figure 31).

Pins R0

1–R03 are multiplexed with peripheral pins SI, SO and TOC, respectively. The peripheral function

modes of these pins are selected by bits 0–2 (PMRA0–PMRA2) of port mode register A (PMRA: $004), as

shown in figure 30.

Port R3 is multiplexed with peripheral function pins AN

0–AN3, respectively. The peripheral function

modes of these pins can be selected by individual pins, by setting A/D mode register 1 (AMR1: $019)

(figure 32).

Ports R4 and R5 are multiplexed with peripheral function pins AN

4–AN11, respectively. The peripheral

function modes of these pins can be selected in 4-pin units by setting bits 1 and 2 (AMR21, AMR22) of

A/D mode register 2 (AMR2: $01A) (figure 33).

Pull-Up MOS Transistor Control: A program-controlled pull-up MOS transistor is provided for each

input/output pin. The on/off status of all these transistors is controlled by bit 3 (MIS3) of the miscellaneous

The on/off status of each transistor and the peripheral function mode of each pin can be set independently.

How to Deal with Unused I/O Pins: I/O pins that are not needed by the user system (floating) must be

connected to V

CC to prevent LSI malfunctions due to noise. These pins must either be pulled up to VCC by

their pull-up MOS transistors or by resistors of about 100 k

Ω.

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