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HD404369F データシート(PDF) 23 Page - Renesas Technology Corp

部品番号 HD404369F
部品情報  microcomputer has an A/D converter
PDF  117 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD404369F データシート(HTML) 23 Page - Renesas Technology Corp

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HD404369 Series
21
Table 3
Interrupt Processing and Activation Conditions
Interrupt Source
INT
0
INT
1
Timer A
Timer B
Timer C
A/D
Serial
IE
1
111
11
1
IF0
IM0
1
000
00
0
IF1
IM1
*
100
00
0
IFTA
IMTA
**
10
00
0
IFTB
IMTB
**
*
10
00
IFTC
IMTC
*
***
10
0
IFAD
IMAD
*
***
*
10
IFS
IMS
*
***
**
1
Note:
Bits marked * can be either 0 or 1. Their values have no effect on operation.
Instruction cycles
12
3
4
5
6
Instruction
execution*
IE reset
Interrupt
acceptance
Execution of JMPL
instruction at vector address
Execution of
instruction at
start address
of interrupt
routine
Vector address
generation
Note: * The stack is accessed and the IE reset after the instruction
is executed, even if it is a two-cycle instruction.
Stacking
Figure 9 Interrupt Processing Sequence



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