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HD404369F データシート(PDF) 14 Page - Renesas Technology Corp |
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HD404369F データシート(HTML) 14 Page - Renesas Technology Corp |
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14 / 117 page  HD404369 Series 12 $000 $003 PMRA $004 SMR $005 SRL $006 SRU $007 TMA $008 TMB1 $009 TRBL/TWBL $00A TRBU/TWBU $00B MIS $00C TMC $00D TRCL/TWCL $00E TRCU/TWCU $00F ACR $016 ADRL $017 ADRU $018 AMR1$019 AMR2 $01A $020 $023 PMRB $024 PMRC $025 TMB2 $026 SSR1 $027 SSR2 $028 DCD0 $02C DCD1 $02D DCD2 $02E DCD3 $02F DCR0 $030 DCR1 $031 DCR2 $032 DCR3 $033 DCR4 $034 DCR5 $035 DCR6 $036 DCR7 $037 DCR8 $038 DCR9 $039 $03F Bit 3 Bit 2 Bit 1 Interrupt control bits area D3/BUZZ R03/TOC R02/SO Serial transmit clock speed selection Serial data register (lower digit) Serial data register (upper digit) Clock source selection (timer A) Clock source selection (timer B) Timer B register (lower digit) Timer B register (upper digit) SO PMOS control Interrupt frame period selection Clock source selection (timer C) Timer C register (lower digit) Timer C register (upper digit) Analog channel selection A/D data register (lower digit) A/D data register (upper digit) Register flag area Port D3 DCD Port D7 DCD Port D2 DCD Port D6 DCD Port D1 DCD Port D5 DCD Port D9 DCD Port D0 DCD Port D4 DCD Port D8 DCD Port R03 DCR Port R23 DCR Port D11 DCD Port R43 DCR Port R53 DCR Port R63 DCR Port R02 DCR Port R22 DCR Port D10 DCD Port R42 DCR Port R52 DCR Port R62 DCR Port R72 DCR Port R01 DCR Port R11 DCR Port R21 DCR Port D13 DCD Port R41 DCR Port R51 DCR Port R61 DCR Port R71 DCR Port R00 DCR Port R10 DCR Port R20 DCR Port D12 DCD Port R40 DCR Port R50 DCR Port R60 DCR Port R70 DCR 1. 2. 3. 4. 5. 6. 7. 8. 9. R00/SCK Bit 0 1 * 2 * 3 * 2 * Timer-A/time-base Auto-reload on/off Pull-up MOS control A/D conversion time SO output level control in idle states Serial clock source selection Input capture selection 32-kHz oscillation stop 32-kHz oscillation division ratio Notes: R01/SI Not used R33/AN3 R32/AN2 R31/AN1 R30/AN0 4 * R5/AN8–AN11 R4/AN4–AN7 Port R83 DCR Port R93 DCR Port R82 DCR Port R92 DCR Port R81 DCR Port R91 DCR Port R80 DCR Port R90 DCR D4/STOPC Buzzer output *8 D2/EVNB *7 *9 D1/INT1 *5 EVNB detection edge selection Clock select D0/INT0 *6 Not used Clock division ratio selection Port R13 DCR Port R33 DCR Port R12 DCR Port R32 DCR Port R31 DCR Port R30 DCR Not used Not used Not used Not used Not used Not used Not used Not used Figure 5 Special Function Register Area |
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