L99DZ320 datasheet(48/146 Pages) STMICROELECTRONICS

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3.3

Operating modes

L99DZ320 can be operated in 4 different operating modes:

•

Active

•

Debug

•

V1_Standby

•

VBAT_Standby

3.3.1

Active mode

All functions are available, and the device is controlled by SPI.

3.3.2

Debug mode

To allow software debugging, the watchdog can be deactivated by applying an external voltage to the DEBUG

input pin (Vdebug > VdiH).

In debug mode, all device functionality is available, including CAN, which is enabled by default. The watchdog is

deactivated.

At exit from debug mode (Vdebug < VdiL) the watchdog starts with a long open window.

3.3.3

V1_Standby mode

The transition from active mode to V1_Standby mode is controlled by SPI.

To supply the microcontroller in a low-power mode, the V1 voltage regulator remains active.

After the V1 standby command (CSN low to high transition), the device enters V1_Standby mode immediately

and the watchdog starts a long open window (tLW). The watchdog is deactivated as soon as the V1 load current

drops below the Icmp threshold (Iv1 < Icmp).

The V1 load current monitoring can be deactivated by setting ICMP = 1. In this configuration, the watchdog is

deactivated upon transition into V1_Standby mode without monitoring the V1 load current.

Writing ICMP (CR2) = 1 is only possible with the first SPI command after setting ICMP_CONFIG_EN (CR1) = 1.

The ICMP_CONFIG_EN bit is reset to ‘0’ automatically with the next SPI command.

Power outputs (except HS15 & HS0), as well as the LIN and CAN transmitters are switched off in V1_Standby

mode.

HS15 and HS0 remain in the configuration programmed before the standby command in order to enable (cyclic)

supply of external contacts.

Note:

Before going to V1_Standby mode, the OL_H1L2 and OL_H2L1 bits in control register 12 must be set to 0 to

achieve the specified current consumption.

3.3.4

Interrupt

The interrupt signal (linked to RXDL/NINT internally) indicates a wake-up event from V1_Standby mode. This is

the only mode in which the pin is configured as NINT, otherwise it works as RXDL. In case of a wake-up by wake-

up inputs, valid wake-up frames on LIN or CAN, (activity on LIN or CAN), SPI access or timer interrupt, the NINT

pin is pulled low for 56 μs, after a reaction time tInt_react from the related wake-up event.

In case of increasing V1 load current during V1_Standby mode (Iv1 > Icmp), the device remains in standby mode

and the watchdog starts with a long open window. No interrupt signal is generated.

3.3.5

VBAT_Standby mode

The transition from active mode to VBAT_Standby mode is initiated by an SPI command.

In VBAT_Standby mode, the voltage regulators V1 and V2, the power outputs (except HS15 and HS0) as well as

LIN and CAN transmitters are switched off. An NReset pulse is generated upon wake-up from VBAT_Standby

mode.

Note:

Before going to VBAT_Standby mode, OL_H1L2 and OL_H2L1 bits in control register 12 must be set to 0 to

achieve the specified current consumption.

L99DZ320

Functional description

DS14235 - Rev 5

page 48/146

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