L99DZ320 datasheet(37/146 Pages) STMICROELECTRONICS

37 / 146 page

Table 36. LIN receive data output: pin RXD

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Item

VRXDLOW

Output voltage dominant level

Active mode

0.2

0.5

E.062

VRXDHIGH

Output voltage recessive level

Active mode

V1-0.5

V1-0.2

E.063

Table 37. LIN transmitter and receiver: pin LIN

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit Item

VTHdom

Receiver threshold voltage

recessive to dominant state

0.4*

VSREG

0.45*

VSREG

0.5*

VSREG

E.064

VBusdom

Receiver dominant state

0.4*

VSREG

E.065

VTHrec

Receiver threshold voltage

dominant to recessive state

0.5*

VSREG

0.55*

VSREG

0.6*

VSREG

E.066

VBusrec

Receiver recessive state

0.6*

VSREG

E.067

VTHhys

Receiver threshold hysteresis:

VTHrec -VTHdom

0.07*

VSREG

0.1*

VSREG

0.175*

VSREG

E.068

VTHcnt

Receiver tolerance center value:

(VTHrec +VTHdom)/2

0.475*

VSREG

0.5*

VSREG

0.525*

VSREG

E.069

VTHwkup

Receiver wakeup threshold

activation voltage (rising edge)

0.5*

VSREG

0.55*

VSREG

0.6*

VSREG

E.070

VTHwkdwn

Receiver wakeup threshold

activation voltage (falling edge)

0.4*

VSREG

0.45*

VSREG

0.5*

VSREG

E.071

tlinbus

LIN bus wake-up dominant filter

time

Sleep mode;

Edge: rec-dom;

Tested by scan

μs

E.072

tdom_LIN

LIN bus wake-up dominant filter

time

Sleep mode;

Edge: rec-dom-rec;

Tested by scan

μs

E.073

ILINDomSC

Transmitter input current limit in

dominant state

VTXD = VTXDLOW; VLIN = VBAT = 18 V

100

180

mA E.074

Ibus_PAS_dom

Input leakage current at the

receiver incl. pull-up resistor

VTXD = VTXDHIGH;

VLIN = 0 V; VBAT = 12 V(1)

-1

mA E.075

Ibus_PAS_rec

Transmitter input current in

recessive state

In standby modes;

VTXD = VTXDHIGH; VLIN > 8 V;

VBAT < 18 V; VLIN ≥ VBAT

μA

E.076

Ibus_NO_GND

Input current if loss of GND at

Device

GND = VS; 0 V < VLIN < 18 V; VBAT = 12 V

-1

mA E.077

Ibus

Input current if loss of VBAT at

Device

GND = VS; 0 V < VLIN < 18 V

μA

E.078

VLINdom

LIN voltage level in dominant

state

Active mode ; VTXD = VTXDLOW;

Rbus = 500 Ω

1.2

E.080

VLINrec

LIN voltage level in recessive

state

Active mode; VTXD = VTXDHIGH;

ILIN = 10 μA

0.8*

VSREG

E.081

RLINup

LIN output pull-up resistor

VLIN = 0 V

kΩ

E.082

CLIN(2)

LIN input capacitance

E.083

L99DZ320

Electrical specifications

DS14235 - Rev 5

page 37/146

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