L99DZ320 datasheet(39/146 Pages) STMICROELECTRONICS

39 / 146 page

Figure 9. LIN transmit, receive timing

20%

80%

VLINrec

VTHrec

VTHdom

VLINdom

VTXD

VRXD

VLIN

tTXpdf

tRXpdr

tTXpdr

tRXpdf

2.4.20

SPI

The voltages are referred to ground, and currents are assumed positive, when the current flows into the pin.

6 V < VSREG < 18 V, all outputs open, TJ = -40 °C to 150 °C, unless otherwise specified.

Table 39. Input: CSN

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Item

VCSNLOW

Input voltage low level

Normal mode, V1 = 5 V

1.0

1.45

B.001

VCSNHIGH

Input voltage high level

Normal mode, V1 = 5 V

1.85

2.3

B.002

VCSNHYS

VCSNHIGH - VCSNLOW

Normal mode, V1 = 5 V

0.2

0.4

B.003

ICSNPU

CSN pull-up resistor

Normal mode, V1 = 5 V

kΩ

B.004

Table 40. Inputs: CLK, DI

Symbol

Parameter

Test condition

Min. Typ. Max. Unit

Item

tset(1)

Delay time from V1_Standby to

active mode

Switching from V1_Standby to active mode using SPI wake-

up access. Time until output drivers (P-channel) are enabled

after CSN going to high. (First SPI wake-up access include

the enable of the driver)

µs

B.005

Switching from V1_Standby to active mode using SPI wake-

up access. Time until output drivers (N-channel) are enabled

after CSN going to high.

600

µs

B.006

Vin L

Input low level

V1 = 5 V

1.0 1.45

B.007

Vin H

Input high level

V1 = 5 V

1.8

2.3

B.008

Vin Hyst Input hysteresis

V1 = 5 V

0.2

0.4

B.009

Iin

Pull-down current at input

Vin = 1 V

µA

B.010

Cin(1)

Input capacitance at input CSN,

CLK, DI, PWM1-6 and PWM4-5

0 V < V1 < 5.3 V

B.011

fCLK

SPI input frequency at CLK

MHz B.012

1. Parameter specified by design, not tested in production.

L99DZ320

Electrical specifications

DS14235 - Rev 5

page 39/146

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