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L99DZ320 データシート(PDF) 71 Page - STMicroelectronics |
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L99DZ320 データシート(HTML) 71 Page - STMicroelectronics |
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71 / 146 page ![]() Nb Control pins Control bits Failure bits Output pin Mode Description 19 Half bridge mode 0 1 1 0 1 1 0 0 0 0 0 L L H L 20 1 0 1 0 1 1 0 0 0 0 0 H L L L 21 1 1 1 0 1 1 0 0 0 0 0 H L H L 22 0 0 1 1 1 1 0 0 0 0 0 H L H L 23 0 1 1 1 1 1 0 0 0 0 0 H L L H 24 1 0 1 1 1 1 0 0 0 0 0 L H H L 25 1 1 1 1 1 1 0 0 0 0 0 L H L H 1. Only the half bridge (low-side and high-side), in which one Power MOSFET is in short-circuit condition is switched off. Both Power MOSFETs of the other half bridge remain active and driven by DIRH and PWMH. H-bridge is forced off during long open window until watchdog kicks in short window, keeping control bits accessible in the meanwhile. 3.25 H-bridge driver slew rate control The rising and falling slope of the drivers for the external high-side Power MOSFET can be slew rate controlled. If this mode is enabled the gate of the external high-side Power MOSFET is driven by a current source instead of a low impedance output driver switch as long as the drain-source voltage over this Power MOSFET is above the switch threshold. The current is programmed using the bits SLEW<4:0>, which represent a binary number. This number is multiplied by the minimum current step. This minimum current step is the maximum source/sink current (IGHxrmax/IGHxfmax) divided by 31. Programming SLEW<4:0> to 0 disables the slew rate control and the output is driven by the low impedance output driver switch. Note: To avoid crosscurrent conduction, it must be avoided the usage of the lowest slew rate configurations. L99DZ320 Functional description DS14235 - Rev 5 page 71/146 |
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