HD404369F datasheet(111/117 Pages) RENESAS

111 / 117 page

HD404369 Series

109

Item

Symbol

Pins

Min

Typ

Max

Unit

Test Condition

Notes

RESET low width

RSTL

RESET

——t

cyc

STOPC low width t

STPL

STOPC

——t

RESET rise time

RSTr

RESET

—

STOPC rise time

STPr

STOPC

—

Input capacitance

All input pins except

TEST, R1 and R2

—

f = 1 MHz, V

in = 0 V

TEST

—

f = 1 MHz, V

in = 0 V

TEST

—

180

f = 1 MHz, V

in = 0 V

R1, R2

—

f = 1 MHz, V

in = 0 V

Notes: 1. When using the subsystem oscillator (32.768 kHz), one of the following relationships for f

OSC

must be applied.

0.4 MHz

≤ f

OSC ≤ 1.0 MHz or 1.6 MHz ≤ fOSC ≤ 5.0 MHz

The operating range for f

OSC can be set with bit 1 of system clock selection register 1 (SSR1:

$027).

2. When using the subsystem oscillator (32.768 kHz), one of the following relationships for f

OSC

must be applied.

0.4 MHz

≤ f

OSC ≤ 1.0 MHz or 1.6 MHz ≤ f OSC ≤ 8.5 MHz

The operating range for f

OSC can be set with bit 1 of system clock selection register 1 (SSR1:

$027).

3. V

CC = 4.5 to 5.5V

4. The oscillation stabilization time is the period required for the oscillator to stabilize in the

following situations:

a. After V

CC reaches 2.7 V at power-on.

b. After

RESET input goes low when stop mode is cancelled.

c. After

STOPC input goes low when stop mode is cancelled.

To ensure the oscillation stabilization time at power-on or when stop mode is cancelled,

RESET

STOPC must be input for at least a duration of t

RC.

When using a crystal or ceramic oscillator, consult with the manufacturer to determine what

stabilization time is required, since it will depend on the circuit constants and stray capacitance.

5. Refer to figure 84.

6. Refer to figure 85.

7. Refer to figure 86.

8. Refer to figure 87.

9. Applies to the HD40A4364, HD40A4368, HD40A43612, and HD40A4369.

10. Applies to the HD407A4369.

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