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SPC58EE80C3 データシート(PDF) 68 Page - STMicroelectronics |
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SPC58EE80C3 データシート(HTML) 68 Page - STMicroelectronics |
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68 / 154 page  Electrical characteristics SPC58EEx, SPC58NEx 68/154 DS11646 Rev 4 3.14 LFAST pad electrical characteristics The LFAST(LVDS Fast Asynchronous Serial Transmission) pad electrical characteristics apply to both the SIPI and high-speed debug serial interfaces on the device. The same LVDS pad is used for the Microsecond Channel (MSC) and DSPI LVDS interfaces, with different characteristics given in the following tables. 3.14.1 LFAST interface timing diagrams Figure 9. LFAST and MSC/DSPI LVDS timing definition Signal excursions above this level NOT allowed Max. common mode input at RX Signal excursions below this level NOT allowed Min. common mode input at RX Data Bit Period Minimum Data Bit Time Opening = 0.55 * T (LFAST) 0.50 * T (MSC/DSPI) Max Differential Voltage = 285 mV (LFAST) 400 mV (MSC/DSPI) Min Differential Voltage = 100 mV (LFAST) 150 mV (MSC/DSPI) 1743 mV 1600 mV VOS = 1.2 V +/- 10% TX common mode VICOM 150 mV 0V 1743 mV “No-Go” T = 1 /FDATA |ΔVOD| |ΔVOD| ΔPEREYE ΔPEREYE PAD_N PAD_P |
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