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SPC58EE80C3 データシート(PDF) 114 Page - STMicroelectronics |
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SPC58EE80C3 データシート(HTML) 114 Page - STMicroelectronics |
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114 / 154 page ![]() Electrical characteristics SPC58EEx, SPC58NEx 114/154 DS11646 Rev 4 Figure 36. DSPI slave mode — modified transfer format timing (MFTE = 0/1) CPHA = 0 9tSUI CC D Data Setup Time for Inputs(1) —— 10 — ns 10 tHI CC D Data Hold Time for Inputs(1) —— 10 — ns 11 tSUO CC D SOUT Valid Time(1) (2) (3) (after SCK edge) Very strong 25 pF — 30 ns Strong 50 pF — 30 ns Medium 50 pF — 50 ns 12 tHO CC D SOUT Hold Time(1) (2) (3) (after SCK edge) Very strong 25 pF 2.5 — ns Strong 50 pF 2.5 — ns Medium 50 pF 2.5 — ns 1. Input timing assumes an input slew rate of 1 ns (10% - 90%) and uses TTL / Automotive voltage thresholds. 2. All timing values for output signals in this table, are measured to 50% of the output voltage. 3. All output timing is worst case and includes the mismatching of rise and fall times of the output pads. Table 60. DSPI CMOS slave timing — full duplex — normal and modified transfer formats (MTFE = 0/1) (continued) # Symbol C Characteristic Condition Min Max Unit Pad Drive Load Last Data First Data Data Data SIN SOUT SS SCK Input First Data Last Data SCK Input (CPOL = 0) (CPOL = 1) tSCK tA tDIS tSDC tSDC tCSC tASC tSUI tHI tSUO tHO |
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