ADA4255ACPZ-R7 datasheet(31/64 Pages) AD

部品番号	ADA4255ACPZ-R7

部品情報	Zero Drift, High Voltage, Programmable Gain Instrumentation Amplifier with Charge Pump

PDF	64 Pages

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メーカー	AD [Analog Devices]

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31 / 64 page

Data Sheet

ADA4255

THEORY OF OPERATION

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Rev. 0 | 31 of 64

When configured for SCS mode, communication with the ADA4255

and all slave devices follows a predefined pattern. The first CS

pulse is passed to the first GPIOx that is set up for SCS mode, ef-

fectively communicating with the first slave device. Subsequent CS

pulses progress through any GPIOx pins configured for SCS mode

in ascending order. The last CS pulse addresses the ADA4255

itself. This pattern repeats until SCS mode is disabled.

Figure 92 and Figure 93 show the ADA4255 operating in SCS

mode with GPIO0 and GPIO1 communicating with two slave devi-

ces. GPIO0 is connected to the CS line of an ADC, and GPIO1 is

connected to the CS line of a digital-to-analog converter (DAC).

Figure 92. Typical SCS Implementation with Devices Without SDO Tristate Support

Figure 93. Typical SCS Implementation with All Devices Supporting SDO Tristate

ADA4255ACPZ-R7 データシート(PDF) 31 Page - Analog Devices