ADA4255ACPZ-R7 datasheet(50/64 Pages) AD

50 / 64 page

Data Sheet

ADA4255

analog.com

Rev. 0 | 50 of 64

ANALOG ERROR REGISTER (ANALOG_ERR)

DETAILS

Table 17. ANALOG_ERR Register Details (Register 0x04)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Bit Name

G_RST

POR_HV

Reserved

WB_ERR

FAULT_INT

OUTPUT_ERR

INPUT_ERR

MUX_OVER_VOLT_ERR

Access

R/W

Reserved

R/W

Reset

Reserved

Bit 7, G_RST—Gain Reset Flag

The G_RST flag indicates that the gain settings in the GAIN_ MUX

event in one or more of the input amplifiers that lasted more than

200 μs. Bit G5 in the TEST_MUX register is not reset by this

event. This safety measure protects the input resistor network from

overvoltage. This flag can be cleared by writing a 1 to this bit.

Clearing this flag does not restore gain settings to the previous

values.

Bit 6, POR_HV—Power-On Reset HV Supply

The POR_HV flag indicates that an event occurred on VDDH,

VSSH, or VDDCP, causing the power-on reset circuit to trip. When

the supply voltage returns to a valid state, the ADA4255 runs a

calibration. Clear this error flag by writing a 1 to this bit position.

Bit 4, WB_ERR—Wire Break Detect Error

When performing a wire break test using the WB_DETECT register,

the WB_ERR flag indicates a fault on the inputs of the amplifier.

Clear this error by writing a 1 to this bit position.

Bit 3, FAULT_INT—Fault Interrupt

An OR function is performed on all unmasked error flags in

the ANALOG_ERR register and the DIGITAL_ERR register to

generate the FAULT_INT fault interrupt. Configuring GPIO3 as

an output using the corresponding GPIO_DIR bit and setting the

FAULT_INT_OUT bit (Register SF_CFG) to 1 outputs this signal to

GPIO3. Clear this error by writing a 1 to this bit position. In this

mode, GPIO3 is active low.

Bit 2, OUTPUT_ERR—Output Amplifier Error

The OUTPUT_ERR flag indicates that the output amplifier is over-

loaded. The cause of this overload condition is either the output

voltage saturating or excessive current being conducted from the

output of the amplifier. Clear this error by writing a 1 to this bit

position.

Bit 1, INPUT_ERR—Input Amplifier Error

The INPUT_ERR flag indicates that one of the input amplifiers is

overloaded. The cause of this overload condition is either saturation

of one of the amplifier outputs, or a violation of the input voltage

range. When this error flag is tripped for longer than 200 μs, gain

settings in the GAIN_MUX register reset to the default values and

the G_RST flag is set to 1. Bit G5 is not reset. Clear this error by

writing a 1 to this bit position.

Bit 0, MUX_OVER_VOLT_ERR—Input

Multiplexer Overvoltage Error

The MUX_OVER_VOLT_ERR flag indicates that excessive voltage

is detected by the input multiplexer. The multiplexer turns all chan-

nels off to protect the input amplifier. Reads of the INPUT_MUX

detection is typically VSSH + 0.9 V and VDDH − 0.9 V. When the

input voltage returns to the valid range after 20 μs, the multiplexer

returns to the previous settings. If latched mode is in use, the error

flag remains until reset. If nonlatched mode is used, the error flag

clears when the multiplexer returns to the previous settings.

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