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ADA4255ACPZ-R7 データシート(PDF) 58 Page - Analog Devices

部品番号 ADA4255ACPZ-R7
部品情報  Zero Drift, High Voltage, Programmable Gain Instrumentation Amplifier with Charge Pump
PDF  64 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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ADA4255ACPZ-R7 データシート(HTML) 58 Page - Analog Devices

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Data Sheet
ADA4255
REGISTER DETAILS
analog.com
Rev. 0 | 58 of 64
ERROR CONFIGURATION REGISTER
(ERR_CFG) DETAILS
Table 27. ERR_CFG Register Details (Register 0x0D)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit Name
ERR_LATCH_DIS
Reserved
ERR_DELAY[3:0]
Access
R/W
Reserved
R/W
R/W
R/W
R/W
Reset
0
Reserved
0
1
0
0
Bit 7, ERR_LATCH_DIS—Disable Error
Latching
By default, ERR_LATCH_DIS is cleared to 0 and error flags are
latched and require resetting. Setting ERR_LATCH_DIS to 1 makes
the errors appear transparently (nonlatching) on the respective out-
puts. When ERR_LATCH_DIS is set to 1, errors can be suppressed
for the time interval configured by the ERR_DELAY bits.
Bits[3:0], ERR_DELAY[3:0] —Error
Suppression Time
When ERR_LATCH_DIS is set to 1, ERR_DELAY determines the
number of clock cycles an error must remain present before the
error flag is tripped, which eliminates false trips due to noise and
transients.
Table 28. Error Flag Suppression Time
ERR_DELAY[3:0]
Clock Cycles (µs)
0x0
0
0x1
1
0x2
2
0x3
3
0x4
4
0x5
5
0x6
6
0x7
7
0x8
8
0x9
12
0xA
16
0xB
24
0xC
32
0xD
48
0xE
64
0xF
127



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