ADA4255ACPZ-R7 datasheet(53/64 Pages) AD

53 / 64 page

Data Sheet

ADA4255

analog.com

Rev. 0 | 53 of 64

WIRE BREAK DETECT REGISTER

(WB_DETECT) DETAILS

Table 20. WB_DETECT Register Details (Register 0x07)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Bit Name

WB_G_RST_DIS

Reserved

SW_F1

SW_F2

WB_CURRENT[1:0]

Access

R/W

Reserved

R/W

Reset

Reserved

Figure 111. Wire Break Current Connectivity

Bit 7, WB_G_RST_DIS—Wire Break Gain Reset

Disable

The WB_G_RST_DIS bit can be set to 1 to prevent the gain

settings in the GAIN_MUX register from being overridden to

1/16 V/V when the SW_F1 bit or the SW_F2 bit are set to 1.

Bit 3, SW_F1, and Bit 2, SW_F2—Fault Switch

Selection

The SW_F1 bit and the SW_F2 bit are used to connect the wire

break current sources to the inputs, as shown in Figure 111. Setting

SW_F1 or SW_F2 to 1 closes each corresponding switch. Both

switches can be closed simultaneously. When SW_F1 or SW_F2

are set to 1 and WB_G_RST_DIS is cleared to 0, the gain settings

in the GAIN_MUX register are temporarily overridden to the default

values. Reading the GAIN_MUX register while SW_F1 or SW_F2

are set to 1 does not show this temporary override. When SW_F1

or SW_F2 are cleared to 0, the gain is also restored to the previous

value.

Bits[1:0], WB_CURRENT—Detection Current

Selection

Table 21 shows four different current values that can be used for

wire break detection. Both current sources are set to the program-

med value. The comparator used to detect a wire break event has a

threshold at approximately 4 V from VDDH.

Table 21. Wire Break Detect Current Values

WB_CURRENT[1:0] Bits

Current Source

Value

Threshold VDDCP =

5 V

Bit 1

Bit 0

250 nA

73.2 MΩ

2 μA

9.15 MΩ

4 μA (default)

4.58 MΩ

16 μA

1.14 MΩ

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