データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

ADA4255ACPZ-R7 データシート(PDF) 56 Page - Analog Devices

部品番号 ADA4255ACPZ-R7
部品情報  Zero Drift, High Voltage, Programmable Gain Instrumentation Amplifier with Charge Pump
PDF  64 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

ADA4255ACPZ-R7 データシート(HTML) 56 Page - Analog Devices

Back Button ADA4255ACPZ-R7 Datasheet HTML 52Page - Analog Devices ADA4255ACPZ-R7 Datasheet HTML 53Page - Analog Devices ADA4255ACPZ-R7 Datasheet HTML 54Page - Analog Devices ADA4255ACPZ-R7 Datasheet HTML 55Page - Analog Devices ADA4255ACPZ-R7 Datasheet HTML 56Page - Analog Devices ADA4255ACPZ-R7 Datasheet HTML 57Page - Analog Devices ADA4255ACPZ-R7 Datasheet HTML 58Page - Analog Devices ADA4255ACPZ-R7 Datasheet HTML 59Page - Analog Devices ADA4255ACPZ-R7 Datasheet HTML 60Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 56 / 64 page
background image
Data Sheet
ADA4255
REGISTER DETAILS
analog.com
Rev. 0 | 56 of 64
DIGITAL ERROR MASK REGISTER
(DIGITAL_ERR_DIS) DETAILS
The DIGITAL_ERR_DIS register can be used to mask individual error flags in the DIGITAL_ERR register. Setting bits in the DIGITAL_ERR_DIS
register to 1 disables the error flag.
Table 25. DIGITAL_ERR_DIS Register Details (Register 0x0B)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit Name
Reserved
CAL_
BUSY_DIS
SPI_CRC_ERR_DIS
SPI_RW_
ERR_DIS
SPI_SCLK_CNT_
ERR_DIS
M_CLK_CNT_
ERR_DIS
MM_CRC_
ERR_DIS
ROM_CRC_
ERR_DIS
Access
Reserved
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Reserved
0
1
0
0
0
0
0
Bit 6, CAL_BUSY_DIS—Disable Calibration
Busy Error Flag
The CAL_BUSY_DIS bit disables the CAL_BUSY error flag.
Bit 5, SPI_CRC_ERR_DIS—Disable SPI CRC
Error Flag
When SPI_CRC_ERR_DIS is cleared to 0, the ADA4255 expects
an additional checksum byte with write commands and transmits
an extra checksum byte with read commands. By default, SPI_
CRC_ERR_DIS is set to 1, and this functionality is disabled. After
enabling CRC, a manual check can be performed to ensure that
the CRC configuration command was properly communicated. If the
CRC is used, it is recommended to configure the CRC before other
registers so that all subsequent communication receives the CRC.
Bit 4, SPI_RW_ERR_DIS—Disable SPI Read/
Write Error Flag
The SPI_RW_ERR_DIS bit disables the SPI_RW_ERR error flag.
Bit 3, SPI_SCLK_CNT_ERR_DIS—Disable SPI
SCLK Count Error Flag
The SPI_SCLK_CNT_ERR_DIS bit disables the
SPI_SCLK_CNT_ERR error flag.
Bit 2, M_CLK_CNT_ERR_DIS—Disable Master
Clock Count Output
When the M_CLK_CNT_ERR_DIS bit is set to 0, the master clock
is updated in the M_CLK_CNT register. Setting this bit to 1 stops
M_CLK_CNT from incrementing.
Bit 1, MM_CRC_ERR_DIS—Disable Memory
Map CRC Error Flag
The MM_CRC_ERR_DIS bit disables the MM_CRC_ERR error
flag.
Bit 0, ROM_CRC_ERR_DIS—Disable ROM CRC
Error Flag
The ROM_CRC_ERR_DIS bit disables the ROM_CRC_ERR error
flag.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com