H8SXSLASH1663R datasheet(45/1504 Pages) RENESAS

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Section 1 Overview

Rev. 2.00 Sep. 24, 2008 Page 13 of 1468

REJ09B0412-0200

1.4

Pin Assignments

1.4.1

Pin Assignments

LQFP-144

(Top View)

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89

PH6/D6

PH5/D5

PH4/D4

Vss

PH3/D3

PH2/D2

PH1/D1

PH0/D0

Vcc

P34/PO12/TIOCA1/

TEND1-B/ETEND3

P33/PO11/TIOCC0/TIOCD0/TCLKB-A/

DREQ1-B/EDREQ3

NMI

P27/PO7/TIOCA5/TIOCB5

P26/PO6/TIOCA5/TMO1/TxD1

P32/PO10/TIOCC0/TCLKA-A/

DACK0-B/EDACK2

P31/PO9/TIOCA0/TIOCB0/

TEND0-B/ETEND2

P30/PO8/TIOCA0/

DREQ0-B/EDREQ2

P25/PO5/TIOCA4/TMCI1/RxD1

P24/PO4/TIOCA4/TIOCB4/TMRI1/SCK1

P23/PO3/TIOCC3/TIOCD3/

IRQ11-A

P22/PO2/TIOCC3/TMO0/TxD0/

IRQ10-A

P21/PO1/TIOCA3/TMCI0/RxD0/

IRQ9-A

Vcc

P20/PO0/TIOCA3/TIOCB3/TMRI0/SCK0/

IRQ8-A

Vss

MD_CLK

VBUS

DrVss

USD-

USD+

DrVcc

PM4

PM3

EMLE

PD0/A0

PD1/A1

PJ0/PO16/TIOCA6

PJ1/PO17/TIOCA6/TIOCB6

P62/TMO2/SCK4/

DACK2/IRQ10-B/TRST/EDACK0-B

PLLVcc

P63/TMRI3/

DREQ3/IRQ11-B/TMS/EDREQ1-B

PLLVss

P64/TMCI3/

TEND3/TDI/ETEND1-B

P65/TMO3/

DACK3/TCK/EDACK1-B

MD0

PC2/

LUCAS/DQMLU

PC3/

LLCAS/DQMLL

P50/AN0/

IRQ0-B

P51/AN1/

IRQ1-B

P52/AN2/

IRQ2-B

AVcc

P53/AN3/

IRQ3-B

AVss

P54/AN4/

IRQ4-B

Vref

P55/AN5/

IRQ5-B

P56/AN6/DA0/

IRQ6-B

P57/AN7/DA1/

IRQ7-B

MD1

PB4/

CS4-B/WE

PB5/

CS5-D/OE/CKE

PB6/

CS6-D/(RD/WR-B)/ADTRG0-B

MD3

PA0/

BREQO/BS-A

PA1/

BACK/(RD/WR-A)

PA2/

BREQ/WAIT

PA3/

LLWR/LLB

PA4/

LHWR/LUB

PA5/

PA6/

AS/AH/BS-B

Vss

PA7/B

Vcc

PB0/

CS0/CS4-A/CS5-B

88 87 86 85 84

12345678

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

83 82 81 80 79 78 77 76 75 74 73

Notes:

In single-chip mode prots D and E can be used (initial state). Pin functions are selectable by

setting the PCJKE bit in PFCRD. Ports D and E are enabled when PCJKE = 0 (initial value)

and ports J and K are enabled when PCJKE = 1. In external extended mode, only ports D

and E can be used.

This pin is an on-chip emulator enable pin. Drive this pin low for the connection in normal

operating mode.

The on-chip emulator function is enabled by driving this pin high. When the on-chip emulator

is in use, the P62, P63, P64, P65, and WDTOVF pins are dedicated pins for the on-chip emulator.

For details on a connection example with the E10A, see E10A Emulator User's Manual.

Figure 1.3 Pin Assignments (LQFP-144)

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