H8SXSLASH1663R datasheet(20/1504 Pages) RENESAS

20 / 1504 page

Rev. 2.00 Sep. 24, 2008 Page xx of xxxii

13.3.10

Port Function Control Register B (PFCRB) ..................................................... 677

13.3.11

Port Function Control Register C (PFCRC) ..................................................... 679

13.3.12

Port Function Control Register D (PFCRD) ..................................................... 680

13.4

Usage Notes ...................................................................................................................... 681

13.4.1

Notes on Input Buffer Control Register (ICR) Setting ..................................... 681

13.4.2

Notes on Port Function Control Register (PFCR) Settings............................... 681

Section 14 16-Bit Timer Pulse Unit (TPU) ....................................................... 683

14.1

Features............................................................................................................................. 683

14.2

Input/Output Pins.............................................................................................................. 690

14.3

Register Descriptions........................................................................................................ 692

14.3.1

Timer Control Register (TCR).......................................................................... 697

14.3.2

Timer Mode Register (TMDR)......................................................................... 702

14.3.3

Timer I/O Control Register (TIOR) .................................................................. 704

14.3.4

Timer Interrupt Enable Register (TIER) ........................................................... 722

14.3.5

Timer Status Register (TSR)............................................................................. 723

14.3.6

Timer Counter (TCNT)..................................................................................... 727

14.3.7

Timer General Register (TGR) ......................................................................... 727

14.3.8

Timer Start Register (TSTR) ............................................................................ 728

14.3.9

Timer Synchronous Register (TSYR)............................................................... 729

14.4

Operation .......................................................................................................................... 730

14.4.1

Basic Functions................................................................................................. 730

14.4.2

Synchronous Operation..................................................................................... 736

14.4.3

Buffer Operation ............................................................................................... 738

14.4.4

Cascaded Operation .......................................................................................... 742

14.4.5

PWM Modes..................................................................................................... 744

14.4.6

Phase Counting Mode....................................................................................... 749

14.5

Interrupt Sources...............................................................................................................756

14.6

DTC Activation ................................................................................................................ 758

14.7

DMAC Activation ............................................................................................................ 758

14.8

A/D Converter Activation................................................................................................. 758

14.9

Operation Timing.............................................................................................................. 759

14.9.1

Input/Output Timing ......................................................................................... 759

14.9.2

Interrupt Signal Timing .................................................................................... 763

14.10 Usage Notes ...................................................................................................................... 767

14.10.1

Module Stop Function Setting .......................................................................... 767

14.10.2

Input Clock Restrictions ................................................................................... 767

14.10.3

Caution on Cycle Setting .................................................................................. 768

14.10.4

Conflict between TCNT Write and Clear Operations....................................... 768

14.10.5

Conflict between TCNT Write and Increment Operations ............................... 769

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