H8SXSLASH1663R datasheet(30/1504 Pages) RENESAS

30 / 1504 page

Rev. 2.00 Sep. 24, 2008 Page xxx of xxxii

Section 28 Power-Down Modes...................................................................... 1235

28.1

Features........................................................................................................................... 1235

28.2

Register Descriptions...................................................................................................... 1239

28.2.1

Standby Control Register (SBYCR) ............................................................... 1239

28.2.2

Module Stop Control Registers A and B (MSTPCRA and MSTPCRB) ........ 1242

28.2.3

Module Stop Control Register C (MSTPCRC)............................................... 1245

28.2.4

Deep Standby Control Register (DPSBYCR)................................................. 1246

28.2.5

Deep Standby Wait Control Register (DPSWCR).......................................... 1249

28.2.6

Deep Standby Interrupt Enable Register (DPSIER) ....................................... 1251

28.2.7

Deep Standby Interrupt Flag Register (DPSIFR)............................................ 1253

28.2.8

Deep Standby Interrupt Edge Register (DPSIEGR) ....................................... 1255

28.2.9

Reset Status Register (RSTSR)....................................................................... 1256

28.2.10

Deep Standby Backup Register (DPSBKRn) ................................................. 1258

28.3

Multi-Clock Function ..................................................................................................... 1259

28.3.1

Switching of Main Clock Frequencies............................................................ 1259

28.3.2

Switching to Subclock .................................................................................... 1259

28.4

Module Stop State........................................................................................................... 1260

28.5

Sleep Mode ..................................................................................................................... 1260

28.5.1

Entry to Sleep Mode ....................................................................................... 1260

28.5.2

Exit from Sleep Mode..................................................................................... 1260

28.6

All-Module-Clock-Stop Mode........................................................................................ 1261

28.7

Software Standby Mode.................................................................................................. 1262

28.7.1

Entry to Software Standby Mode.................................................................... 1262

28.7.2

Exit from Software Standby Mode ................................................................. 1262

28.7.3

Setting Oscillation Settling Time after Exit from Software Standby Mode.... 1263

28.7.4

Software Standby Mode Application Example............................................... 1265

28.8

Deep Software Standby Mode ........................................................................................ 1266

28.8.1

Entry to Deep Software Standby Mode .......................................................... 1266

28.8.2

Exit from Deep Software Standby Mode........................................................ 1267

28.8.3

Pin State on Exit from Deep Software Standby Mode.................................... 1269

28.8.4

φ/SDRAMφ Operation after Exit from Deep Software Standby Mode........ 1270

28.8.5

Setting Oscillation Settling Time after Exit from Deep Software

Standby Mode................................................................................................. 1271

28.8.6

Deep Software Standby Mode Application Example ..................................... 1273

28.8.7

Flowchart of Deep Software Standby Mode Operation .................................. 1277

28.9

Hardware Standby Mode ................................................................................................ 1279

28.9.1

Transition to Hardware Standby Mode........................................................... 1279

28.9.2

Clearing Hardware Standby Mode.................................................................. 1279

28.9.3

Hardware Standby Mode Timing.................................................................... 1279

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