H8SXSLASH1663R datasheet(21/1504 Pages) RENESAS

21 / 1504 page

Rev. 2.00 Sep. 24, 2008 Page xxi of xxxii

14.10.6

Conflict between TGR Write and Compare Match........................................... 769

14.10.7

Conflict between Buffer Register Write and Compare Match .......................... 770

14.10.8

Conflict between TGR Read and Input Capture ............................................... 770

14.10.9

Conflict between TGR Write and Input Capture .............................................. 771

14.10.10 Conflict between Buffer Register Write and Input Capture.............................. 772

14.10.11 Conflict between Overflow/Underflow and Counter Clearing ......................... 773

14.10.12 Conflict between TCNT Write and Overflow/Underflow ................................ 773

14.10.13 Multiplexing of I/O Pins ................................................................................... 774

14.10.14 PPG1 Setting when TPU1 Pin is Used.............................................................. 774

14.10.15 Interrupts in the Module Stop State .................................................................. 774

Section 15 Programmable Pulse Generator (PPG) ............................................775

15.1

Features............................................................................................................................. 775

15.2

Input/Output Pins.............................................................................................................. 778

15.3

Register Descriptions ........................................................................................................ 780

15.3.1

Next Data Enable Registers H, L (NDERH, NDERL) ..................................... 781

15.3.2

Output Data Registers H, L (PODRH, PODRL)............................................... 784

15.3.3

Next Data Registers H, L (NDRH, NDRL) ...................................................... 786

15.3.4

PPG Output Control Register (PCR) ................................................................ 791

15.3.5

PPG Output Mode Register (PMR) .................................................................. 793

15.4

Operation .......................................................................................................................... 797

15.4.1

Output Timing................................................................................................... 797

15.4.2

Sample Setup Procedure for Normal Pulse Output........................................... 798

15.4.3

Example of Normal Pulse Output (Example of 5-Phase Pulse Output) ............ 800

15.4.4

Non-Overlapping Pulse Output......................................................................... 801

15.4.5

Sample Setup Procedure for Non-Overlapping Pulse Output ........................... 803

15.4.6

Example of Non-Overlapping Pulse Output (Example of 4-Phase

Complementary Non-Overlapping Pulse Output)............................................................. 805

15.4.7

Inverted Pulse Output ....................................................................................... 807

15.4.8

Pulse Output Triggered by Input Capture ......................................................... 808

15.5

Usage Notes ...................................................................................................................... 809

15.5.1

Module Stop State Function.............................................................................. 809

15.5.2

Operation of Pulse Output Pins......................................................................... 809

15.5.3

TPU Setting when PPG1 is in Use.................................................................... 809

Section 16 8-Bit Timers (TMR).........................................................................811

16.1

Features............................................................................................................................. 811

16.2

Input/Output Pins.............................................................................................................. 816

16.3

Register Descriptions ........................................................................................................ 817

16.3.1

Timer Counter (TCNT)..................................................................................... 819

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