H8SXSLASH1663R datasheet(29/1504 Pages) RENESAS

29 / 1504 page

Rev. 2.00 Sep. 24, 2008 Page xxix of xxxii

25.9.3

Error Protection............................................................................................... 1168

25.10 Flash Memory Emulation Using RAM ........................................................................... 1170

25.11 Switching between User MAT and User Boot MAT...................................................... 1173

25.12 Programmer Mode .......................................................................................................... 1174

25.13 Standard Serial Communications Interface Specifications for Boot Mode..................... 1174

25.14 Usage Notes .................................................................................................................... 1203

Section 26 Boundary Scan ...............................................................................1205

26.1

Features........................................................................................................................... 1205

26.2

Block Diagram of Boundary Scan Function ................................................................... 1206

26.3

Input/Output Pins............................................................................................................ 1206

26.4

Register Descriptions ...................................................................................................... 1207

26.4.1

Instruction Register (JTIR) ............................................................................. 1208

26.4.2

Bypass Register (JTBPR) ............................................................................... 1209

26.4.3

Boundary Scan Register (JTBSR)................................................................... 1209

26.4.4

IDCODE Register (JTID) ............................................................................... 1215

26.5

Operations....................................................................................................................... 1216

26.5.1

TAP Controller ............................................................................................... 1216

26.5.2

Commands ...................................................................................................... 1217

26.6

Usage Notes .................................................................................................................... 1219

Section 27 Clock Pulse Generator ...................................................................1221

27.1

Register Description ....................................................................................................... 1223

27.1.1

System Clock Control Register (SCKCR) ...................................................... 1223

27.1.2

Subclock Control Register (SUBCKCR) ........................................................ 1225

27.2

Oscillator......................................................................................................................... 1227

27.2.1

Connecting Crystal Resonator ........................................................................ 1227

27.2.2

External Clock Input ....................................................................................... 1228

27.3

PLL Circuit ..................................................................................................................... 1229

27.4

Frequency Divider .......................................................................................................... 1229

27.5

Subclock Oscillator......................................................................................................... 1229

27.5.1

Connecting 32.768 kHz Crystal Resonator ..................................................... 1229

27.5.2

Handling of Pins when the Subclock is Not to be Used.................................. 1230

27.6

Usage Notes .................................................................................................................... 1231

27.6.1

Notes on Clock Pulse Generator ..................................................................... 1231

27.6.2

Notes on Resonator ......................................................................................... 1232

27.6.3

Notes on Board Design ................................................................................... 1232

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