データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

H8SX/1663R データシート(PDF) 1081 Page - Renesas Technology Corp

部品番号 H8SX/1663R
部品情報  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R データシート(HTML) 1081 Page - Renesas Technology Corp

Back Button H8SX/1663R Datasheet HTML 1077Page - Renesas Technology Corp H8SX/1663R Datasheet HTML 1078Page - Renesas Technology Corp H8SX/1663R Datasheet HTML 1079Page - Renesas Technology Corp H8SX/1663R Datasheet HTML 1080Page - Renesas Technology Corp H8SX/1663R Datasheet HTML 1081Page - Renesas Technology Corp H8SX/1663R Datasheet HTML 1082Page - Renesas Technology Corp H8SX/1663R Datasheet HTML 1083Page - Renesas Technology Corp H8SX/1663R Datasheet HTML 1084Page - Renesas Technology Corp H8SX/1663R Datasheet HTML 1085Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 1081 / 1504 page
background image
Section 21 I
2C Bus Interface 2 (IIC2)
Rev. 2.00 Sep. 24, 2008 Page 1049 of 1468
REJ09B0412-0200
21.3.7
I
2C Bus Transmit Data Register (ICDRT)
ICDRT is an 8-bit readable/writable register that stores the transmit data. When ICDRT detects a
space in the I
2C bus shift register, it transfers the transmit data which has been written to ICDRT
to ICDRS and starts transmitting data. If the next data is written to ICDRT during transmitting
data to ICDRS, continuous transmission is possible.
Bit
Bit Name
Initial Value
R/W
7
1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1
R/W
21.3.8
I
2C Bus Receive Data Register (ICDRR)
ICDRR is an 8-bit read-only register that stores the receive data. When one byte of data has been
received, ICDRR transfers the receive data from ICDRS to ICDRR and the next data can be
received. ICDRR is a receive-only register; therefore, this register cannot be written to by the
CPU.
Bit
Bit Name
Initial Value
R/W
7
1
R
6
1
R
5
1
R
4
1
R
3
1
R
2
1
R
1
1
R
0
1
R
21.3.9
I
2C Bus Shift Register (ICDRS)
ICDRS is an 8-bit register that is used to transmit/receive data. In transmission, data is transferred
from ICDRT to ICDRS and the data is sent from the SDA pin. In reception, data is transferred
from ICDRS to ICDRR after one by of data is received. This register cannot be read from or
written to by the CPU.
Bit
Bit Name
Initial Value
R/W
7
0
−
6
0
−
5
0
−
4
0
−
3
0
−
2
0
−
1
0
−
0
0
−



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com