H8SXSLASH1663R datasheet(117/1504 Pages) RENESAS

117 / 1504 page

Section 3 MCU Operating Modes

Rev. 2.00 Sep. 24, 2008 Page 85 of 1468

REJ09B0412-0200

3.3

9 Operating Mode Descriptions

3.3.1

Mode 1

This is the user boot mode for the flash memory. The LSI operates in the same way as in mode 7

except for programming and erasing of the flash memory. For details, see section 25, Flash

Memory.

3.3.2

Mode 2

This is the boot mode for the flash memory. The LSI operates in the same way as in mode 7

except for programming and erasing of the flash memory. For details, see section 25, Flash

Memory.

3.3.3

Mode 3

This is the boundary scan function enabled single-chip activation mode. The operation is the same

as mode 7 except for the boundary scan function. For details on the boundary scan function, see

section 26, Boundary Scan.

3.3.4

Mode 4

The CPU operating mode is advanced mode in which the address space is 16 Mbytes, and the on-

chip ROM is disabled.

The initial bus width mode immediately after a reset is 16 bits, with 16-bit access to all areas.

Ports D, E, and F function as an address bus, ports H and I function as a data bus, and parts of

ports A and B function as bus control signals. However, if all areas are designated as an 8-bit

access space by the bus controller, the bus mode switches to eight bits, and only port H functions

as a data bus.

H8SX/1663R データシート(PDF) 117 Page - Renesas Technology Corp