H8SXSLASH1663R datasheet(158/1504 Pages) RENESAS

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Section 6 Exception Handling

Rev. 2.00 Sep. 24, 2008 Page 126 of 1468

REJ09B0412-0200

6.7.3

Exception Handling by Illegal Instruction

The illegal instructions are general illegal instructions and slot illegal instructions. The exception

handling by the general illegal instruction starts when an undefined code is executed. The

exception handling by the slot illegal instruction starts when a particular instruction (e.g. its code

length is two words or more, or it changes the PC contents) at a delay slot (immediately after a

delayed branch instruction) is executed. The exception handling by the general illegal instruction

and slot illegal instruction is always executable in the program execution state.

The exception handling is as follows:

1. The contents of PC, CCR, and EXR are saved in the stack.

2. The interrupt mask bit is updated and the T bit is cleared to 0.

3. An exception handling vector table address corresponding to the occurred exception is

generated, the start address of the exception service routine is loaded from the vector table to

PC, and program execution starts from that address.

Table 6.10 shows the state of CCR and EXR after execution of illegal instruction exception

handling.

Table 6.10

Status of CCR and EXR after Illegal Instruction Exception Handling

CCR

EXR

Interrupt Control Mode

I2 to I0



[Legend]

Set to 1

Cleared to 0

:

Retains the previous value.

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